e829eb6d61
dependencies. A 'struct pmc_classdep' structure describes operations on PMCs; 'struct pmc_mdep' contains one or more 'struct pmc_classdep' structures depending on the CPU in question. Inside PMC class dependent code, row indices are relative to the PMCs supported by the PMC class; MI code in "hwpmc_mod.c" translates global row indices before invoking class dependent operations. - Augment the OP_GETCPUINFO request with the number of PMCs present in a PMC class. - Move code common to Intel CPUs to file "hwpmc_intel.c". - Move TSC handling to file "hwpmc_tsc.c".
85 lines
2.7 KiB
C
85 lines
2.7 KiB
C
/*-
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* Copyright (c) 2005, Joseph Koshy
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/* Machine dependent interfaces */
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#ifndef _DEV_HWPMC_PPRO_H_
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#define _DEV_HWPMC_PPRO_H_
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/* Intel PPro, Celeron, P-II, P-III, Pentium-M PMCS */
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#define P6_NPMCS 2 /* 2 PMCs */
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#define P6_EVSEL_CMASK_MASK 0xFF000000
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#define P6_EVSEL_TO_CMASK(C) (((C) & 0xFF) << 24)
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#define P6_EVSEL_INV (1 << 23)
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#define P6_EVSEL_EN (1 << 22)
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#define P6_EVSEL_INT (1 << 20)
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#define P6_EVSEL_PC (1 << 19)
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#define P6_EVSEL_E (1 << 18)
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#define P6_EVSEL_OS (1 << 17)
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#define P6_EVSEL_USR (1 << 16)
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#define P6_EVSEL_UMASK_MASK 0x0000FF00
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#define P6_EVSEL_TO_UMASK(U) (((U) & 0xFF) << 8)
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#define P6_EVSEL_EVENT_SELECT(ES) ((ES) & 0xFF)
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#define P6_EVSEL_RESERVED (1 << 21)
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#define P6_MSR_EVSEL0 0x0186
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#define P6_MSR_EVSEL1 0x0187
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#define P6_MSR_PERFCTR0 0x00C1
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#define P6_MSR_PERFCTR1 0x00C2
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#define P6_PERFCTR_READ_MASK 0xFFFFFFFFFFLL /* 40 bits */
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#define P6_PERFCTR_WRITE_MASK 0xFFFFFFFFU /* 32 bits */
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#define P6_RELOAD_COUNT_TO_PERFCTR_VALUE(R) (-(R))
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#define P6_PERFCTR_VALUE_TO_RELOAD_COUNT(P) (-(P))
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#define P6_PMC_HAS_OVERFLOWED(P) ((rdpmc(P) & (1LL << 39)) == 0)
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struct pmc_md_ppro_op_pmcallocate {
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uint32_t pm_ppro_config;
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};
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#ifdef _KERNEL
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/* MD extension for 'struct pmc' */
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struct pmc_md_ppro_pmc {
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uint32_t pm_ppro_evsel;
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};
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/*
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* Prototypes
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*/
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int pmc_p6_initialize(struct pmc_mdep *_md, int _ncpus);
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void pmc_p6_finalize(struct pmc_mdep *_md);
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#endif /* _KERNEL */
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#endif /* _DEV_HWPMC_PPRO_H_ */
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