90ce56c287
device drivers for bus system with other endinesses than the CPU (using interfaces compatible to NetBSD): - bwap16() and bswap32(). These have optimized implementations on some architectures; for those that don't, there exist generic implementations. - macros to convert from a certain byte order to host byte order and vice versa, using a naming scheme like le16toh(), htole16(). These are implemented using the bswap functions. - stream bus space access functions, which do not perform a byte order conversion (while the normal access functions would if the bus endianess differs from the CPU endianess). htons(), htonl(), ntohs() and ntohl() are implemented using the new functions above for kernel usage. None of the above interfaces is currently exported to user land. Make use of the new functions in a few places where local implementations of the same functionality existed. Reviewed by: mike, bde Tested on alpha by: mike
93 lines
3.0 KiB
C
93 lines
3.0 KiB
C
/*-
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* Copyright (c) 1987, 1991 Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)endian.h 7.8 (Berkeley) 4/3/91
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* $FreeBSD$
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*/
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#ifndef _MACHINE_ENDIAN_H_
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#define _MACHINE_ENDIAN_H_
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#include <sys/cdefs.h>
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#include <machine/ansi.h>
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/*
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* Define the order of 32-bit words in 64-bit words.
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*/
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#define _QUAD_HIGHWORD 1
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#define _QUAD_LOWWORD 0
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/*
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* Definitions for byte order, according to byte significance from low
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* address to high.
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*/
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#ifndef _POSIX_SOURCE
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#define LITTLE_ENDIAN 1234 /* LSB first: i386, vax */
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#define BIG_ENDIAN 4321 /* MSB first: 68000, ibm, net */
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#define PDP_ENDIAN 3412 /* LSB first in word, MSW first in long */
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#define BYTE_ORDER LITTLE_ENDIAN
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#endif /* ! _POSIX_SOURCE */
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#ifdef _KERNEL
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#ifdef __GNUC__
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#define _BSWAP32_DEFINED
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static __inline __uint32_t
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__bswap32(__uint32_t __x)
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{
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#if defined(_KERNEL) && (defined(I486_CPU) || defined(I586_CPU) || defined(I686_CPU)) && !defined(I386_CPU)
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__asm ("bswap %0" : "+r" (__x));
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#else
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__asm ("xchgb %h0, %b0\n\t"
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"rorl $16, %0\n\t"
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"xchgb %h0, %b0"
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: "+q" (__x));
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#endif
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return __x;
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}
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#define _BSWAP16_DEFINED
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static __inline __uint16_t
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__bswap16(__uint16_t __x)
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{
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__asm ("xchgb %h0, %b0" : "+q" (__x));
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return __x;
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}
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#endif /* _KERNEL */
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#endif /* __GNUC__ */
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#endif /* !_MACHINE_ENDIAN_H_ */
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