7023544aec
We need to handle two cases: 1. One process attacking another process. 2. A process attacking the kernel. For the first case we clear the branch predictor state on context switch between different processes. For the second we do this when taking an instruction abort on a non-userspace address. To clear the branch predictor state a per-CPU function pointer has been added. This is set by the new cpu errata code based on if the CPU is known to be affected. On Cortex-A57, A72, A73, and A75 we call into the PSCI firmware as newer versions of this will clear the branch predictor state for us. It has been reported the ThunderX is unaffected, however the ThunderX2 is vulnerable. The Qualcomm Falkor core is also affected. As FreeBSD doesn't yet run on the ThunderX2 or Falkor no workaround is included for these CPUs. MFC after: 3 days Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D13812
81 lines
2.5 KiB
C
81 lines
2.5 KiB
C
/*-
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* Copyright (c) 1999 Luoqi Chen <luoqi@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: FreeBSD: src/sys/i386/include/globaldata.h,v 1.27 2001/04/27
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* $FreeBSD$
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*/
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#ifndef _MACHINE_PCPU_H_
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#define _MACHINE_PCPU_H_
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#include <machine/cpu.h>
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#include <machine/cpufunc.h>
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#define ALT_STACK_SIZE 128
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typedef int (*pcpu_bp_harden)(void);
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#define PCPU_MD_FIELDS \
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u_int pc_acpi_id; /* ACPI CPU id */ \
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u_int pc_midr; /* stored MIDR value */ \
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uint64_t pc_clock; \
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pcpu_bp_harden pc_bp_harden; \
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char __pad[233]
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#ifdef _KERNEL
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struct pcb;
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struct pcpu;
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static inline struct pcpu *
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get_pcpu(void)
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{
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struct pcpu *pcpu;
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__asm __volatile("mov %0, x18" : "=&r"(pcpu));
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return (pcpu);
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}
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static inline struct thread *
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get_curthread(void)
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{
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struct thread *td;
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__asm __volatile("ldr %0, [x18]" : "=&r"(td));
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return (td);
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}
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#define curthread get_curthread()
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#define PCPU_GET(member) (get_pcpu()->pc_ ## member)
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#define PCPU_ADD(member, value) (get_pcpu()->pc_ ## member += (value))
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#define PCPU_INC(member) PCPU_ADD(member, 1)
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#define PCPU_PTR(member) (&get_pcpu()->pc_ ## member)
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#define PCPU_SET(member,value) (get_pcpu()->pc_ ## member = (value))
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#endif /* _KERNEL */
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#endif /* !_MACHINE_PCPU_H_ */
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