Pyun YongHyeon 8b3c64969b Use capability pointer to access PCIe registers rather than ... directly access them at fixed address. Frequently the register offset could be changed if additional PCI capabilities are added to controller. One odd thing is ET_PCIR_L0S_L1_LATENCY register. I think it's PCIe link capabilities register but the location of the register does not match with PCIe capability pointer + offset. I'm not sure it's shadow register of PCIe link capabilities register.		2009-11-19 22:53:41 +00:00
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if_et.c	Use capability pointer to access PCIe registers rather than	2009-11-19 22:53:41 +00:00
if_etreg.h	Remove extra spce at the EOL.	2009-11-19 21:46:58 +00:00
if_etvar.h	Use bus_{read,write}_4 rather than bus_space_{read,write}_4.	2009-11-19 22:06:19 +00:00