8dee0fd04c
r235162: Initial LPC32x0 support. Includes DTS file for Embedded Artists EA3250 board. Peripherals currently supported: - Serial ports - Interrupt controller - Timers - Ethernet - USB host - Framebuffer (in conjunction with SSD1289 LCD controller) - RTC - SPI - GPIO Submitted by: Jakub Wojciech Klama <jceel@freebsd.org>
196 lines
5.2 KiB
C
196 lines
5.2 KiB
C
/*-
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* Copyright (c) 2011 Jakub Wojciech Klama <jceel@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bio.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/endian.h>
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#include <sys/kernel.h>
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#include <sys/kthread.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/queue.h>
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#include <sys/resource.h>
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#include <sys/rman.h>
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#include <sys/time.h>
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#include <sys/timetc.h>
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#include <sys/watchdog.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/cpufunc.h>
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#include <machine/resource.h>
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#include <machine/frame.h>
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#include <machine/intr.h>
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#include <dev/spibus/spi.h>
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#include <dev/spibus/spibusvar.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <arm/lpc/lpcreg.h>
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#include <arm/lpc/lpcvar.h>
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#include "spibus_if.h"
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struct lpc_spi_softc
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{
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device_t ls_dev;
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struct resource * ls_mem_res;
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struct resource * ls_irq_res;
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bus_space_tag_t ls_bst;
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bus_space_handle_t ls_bsh;
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};
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static int lpc_spi_probe(device_t);
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static int lpc_spi_attach(device_t);
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static int lpc_spi_detach(device_t);
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static int lpc_spi_transfer(device_t, device_t, struct spi_command *);
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#define lpc_spi_read_4(_sc, _reg) \
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bus_space_read_4(_sc->ls_bst, _sc->ls_bsh, _reg)
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#define lpc_spi_write_4(_sc, _reg, _val) \
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bus_space_write_4(_sc->ls_bst, _sc->ls_bsh, _reg, _val)
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static int
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lpc_spi_probe(device_t dev)
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{
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if (!ofw_bus_is_compatible(dev, "lpc,spi"))
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return (ENXIO);
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device_set_desc(dev, "LPC32x0 PL022 SPI/SSP controller");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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lpc_spi_attach(device_t dev)
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{
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struct lpc_spi_softc *sc = device_get_softc(dev);
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int rid;
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sc->ls_dev = dev;
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rid = 0;
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sc->ls_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (!sc->ls_mem_res) {
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device_printf(dev, "cannot allocate memory window\n");
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return (ENXIO);
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}
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sc->ls_bst = rman_get_bustag(sc->ls_mem_res);
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sc->ls_bsh = rman_get_bushandle(sc->ls_mem_res);
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rid = 0;
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sc->ls_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
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RF_ACTIVE);
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if (!sc->ls_irq_res) {
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device_printf(dev, "cannot allocate interrupt\n");
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return (ENXIO);
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}
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bus_space_write_4(sc->ls_bst, 0xd0028100, 0, (1<<12)|(1<<10)|(1<<9)|(1<<8)|(1<<6)|(1<<5));
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lpc_pwr_write(dev, LPC_CLKPWR_SSP_CTRL, LPC_CLKPWR_SSP_CTRL_SSP0EN);
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lpc_spi_write_4(sc, LPC_SSP_CR0, LPC_SSP_CR0_DSS(8));
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lpc_spi_write_4(sc, LPC_SSP_CR1, LPC_SSP_CR1_SSE);
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lpc_spi_write_4(sc, LPC_SSP_CPSR, 128);
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device_add_child(dev, "spibus", 0);
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return (bus_generic_attach(dev));
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}
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static int
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lpc_spi_detach(device_t dev)
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{
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return (EBUSY);
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}
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static int
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lpc_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
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{
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struct lpc_spi_softc *sc = device_get_softc(dev);
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struct spibus_ivar *devi = SPIBUS_IVAR(child);
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uint8_t *in_buf, *out_buf;
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int i;
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/* Set CS active */
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lpc_gpio_set_state(child, devi->cs, 0);
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/* Wait for FIFO to be ready */
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while ((lpc_spi_read_4(sc, LPC_SSP_SR) & LPC_SSP_SR_TNF) == 0);
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/* Command */
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in_buf = cmd->rx_cmd;
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out_buf = cmd->tx_cmd;
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for (i = 0; i < cmd->tx_cmd_sz; i++) {
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lpc_spi_write_4(sc, LPC_SSP_DR, out_buf[i]);
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in_buf[i] = lpc_spi_read_4(sc, LPC_SSP_DR);
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}
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/* Data */
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in_buf = cmd->rx_data;
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out_buf = cmd->tx_data;
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for (i = 0; i < cmd->tx_data_sz; i++) {
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lpc_spi_write_4(sc, LPC_SSP_DR, out_buf[i]);
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in_buf[i] = lpc_spi_read_4(sc, LPC_SSP_DR);
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}
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/* Set CS inactive */
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lpc_gpio_set_state(child, devi->cs, 1);
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return (0);
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}
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static device_method_t lpc_spi_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, lpc_spi_probe),
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DEVMETHOD(device_attach, lpc_spi_attach),
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DEVMETHOD(device_detach, lpc_spi_detach),
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/* SPI interface */
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DEVMETHOD(spibus_transfer, lpc_spi_transfer),
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{ 0, 0 }
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};
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static devclass_t lpc_spi_devclass;
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static driver_t lpc_spi_driver = {
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"spi",
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lpc_spi_methods,
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sizeof(struct lpc_spi_softc),
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};
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DRIVER_MODULE(lpcspi, simplebus, lpc_spi_driver, lpc_spi_devclass, 0, 0);
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