This adds new target architectures for hardfloat: mipselhf mipshf mips64elhf mips64hf. Tested in QEMU only. Sponsored by: DARPA, AFRL Sponsored by: HEIF5 Differential Revision: https://reviews.freebsd.org/D8376
39 lines
792 B
Makefile
39 lines
792 B
Makefile
# $FreeBSD$
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.if ${TARGET_ARCH:Mmips*el*} != ""
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_EMULATION_ENDIAN=little
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.else
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_EMULATION_ENDIAN=big
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.endif
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.if ${TARGET_ARCH:Mmips64*} != ""
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DEFAULT_VECTOR= bfd_elf64_trad${_EMULATION_ENDIAN}mips_vec
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.elif ${TARGET_ARCH:Mmipsn32*} != ""
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DEFAULT_VECTOR= bfd_elf32_ntrad${_EMULATION_ENDIAN}mips_vec
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.else
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DEFAULT_VECTOR=bfd_elf32_trad${_EMULATION_ENDIAN}mips_vec
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.endif
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SRCS+= coff-mips.c \
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cpu-mips.c \
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ecoff.c \
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ecofflink.c \
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elf32.c \
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elf64.c \
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elfn32-mips.c \
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elf32-mips.c \
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elf64-mips.c \
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elfxx-mips.c \
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elf32-target.h \
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elf64-target.h \
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elflink.c
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VECS= bfd_elf32_tradbigmips_vec \
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bfd_elf32_tradlittlemips_vec \
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bfd_elf32_ntradbigmips_vec \
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bfd_elf32_ntradlittlemips_vec \
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bfd_elf64_tradbigmips_vec \
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bfd_elf64_tradlittlemips_vec \
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ecoff_little_vec \
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ecoff_big_vec
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