6f3b523c9a
Move dump_avail[] extern declaration and inlines into a new header vm/vm_dumpset.h. This fixes default gcc build for mips. Reviewed by: alc, scottph Tested by: kevans (previous version) Sponsored by: The FreeBSD Foundation Differential revision: https://reviews.freebsd.org/D26741
243 lines
6.0 KiB
C
243 lines
6.0 KiB
C
/*-
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* Copyright (c) 2009 Oleksandr Tymoshenko
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* Copyright (c) 2015 Alexander Kabaev
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_ddb.h"
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#include "opt_platform.h"
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#include <sys/param.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/boot.h>
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#include <sys/cons.h>
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#include <sys/kdb.h>
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#include <sys/mutex.h>
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#include <sys/reboot.h>
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#ifdef FDT
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#endif
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#include <vm/vm.h>
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#include <vm/vm_param.h>
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#include <vm/vm_page.h>
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#include <vm/vm_phys.h>
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#include <vm/vm_dumpset.h>
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#include <net/ethernet.h>
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#include <machine/clock.h>
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#include <machine/cpu.h>
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#include <machine/cpufunc.h>
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#include <machine/hwfunc.h>
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#include <machine/md_var.h>
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#include <machine/trap.h>
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#include <mips/ingenic/jz4780_regs.h>
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#include <mips/ingenic/jz4780_cpuregs.h>
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uint32_t * const led = (uint32_t *)0xb0010548;
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extern char edata[], end[];
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static char boot1_env[4096];
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void
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platform_cpu_init(void)
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{
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uint32_t reg;
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/*
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* Do not expect mbox interrups while writing
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* mbox
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*/
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reg = mips_rd_xburst_reim();
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reg &= ~JZ_REIM_MIRQ0M;
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mips_wr_xburst_reim(reg);
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/* Clean mailboxes */
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mips_wr_xburst_mbox0(0);
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mips_wr_xburst_mbox1(0);
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mips_wr_xburst_core_sts(~JZ_CORESTS_MIRQ0P);
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/* Unmask mbox interrupts */
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reg |= JZ_REIM_MIRQ0M;
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mips_wr_xburst_reim(reg);
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}
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void
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platform_reset(void)
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{
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/*
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* For now, provoke a watchdog reset in about a second, so UART buffers
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* have a fighting chance to flush before we pull the plug
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*/
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writereg(JZ_TCU_BASE + JZ_WDOG_TCER, 0); /* disable watchdog */
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writereg(JZ_TCU_BASE + JZ_WDOG_TCNT, 0); /* reset counter */
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writereg(JZ_TCU_BASE + JZ_WDOG_TDR, 128); /* wait for ~1s */
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writereg(JZ_TCU_BASE + JZ_WDOG_TCSR, TCSR_RTC_EN | TCSR_DIV_256);
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writereg(JZ_TCU_BASE + JZ_WDOG_TCER, TCER_ENABLE); /* fire! */
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/* Wait for reset */
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while (1)
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;
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}
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static void
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mips_init(void)
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{
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int i;
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#ifdef FDT
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struct mem_region mr[FDT_MEM_REGIONS];
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uint64_t val;
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int mr_cnt;
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int j;
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#endif
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for (i = 0; i < 10; i++) {
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phys_avail[i] = 0;
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}
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/* The minimal amount of memory Ingenic SoC can have. */
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dump_avail[0] = phys_avail[0] = MIPS_KSEG0_TO_PHYS(kernel_kseg0_end);
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physmem = realmem = btoc(32 * 1024 * 1024);
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/*
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* X1000 mips cpu special.
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* TODO: do anyone know what is this ?
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*/
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__asm(
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"li $2, 0xa9000000 \n\t"
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"mtc0 $2, $5, 4 \n\t"
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"nop \n\t"
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::"r"(2));
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#ifdef FDT
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if (fdt_get_mem_regions(mr, &mr_cnt, &val) == 0) {
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physmem = realmem = btoc(val);
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KASSERT((phys_avail[0] >= mr[0].mr_start) && \
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(phys_avail[0] < (mr[0].mr_start + mr[0].mr_size)),
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("First region is not within FDT memory range"));
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/* Limit size of the first region */
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phys_avail[1] = (mr[0].mr_start + MIN(mr[0].mr_size, ctob(realmem)));
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dump_avail[1] = phys_avail[1];
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/* Add the rest of regions */
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for (i = 1, j = 2; i < mr_cnt; i++, j+=2) {
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phys_avail[j] = mr[i].mr_start;
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phys_avail[j+1] = (mr[i].mr_start + mr[i].mr_size);
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dump_avail[j] = phys_avail[j];
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dump_avail[j+1] = phys_avail[j+1];
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}
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}
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#endif
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init_param1();
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init_param2(physmem);
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mips_cpu_init();
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pmap_bootstrap();
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mips_proc0_init();
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mutex_init();
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kdb_init();
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led[0] = 0x8000;
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#ifdef KDB
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if (boothowto & RB_KDB)
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kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
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#endif
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}
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void
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platform_start(__register_t a0, __register_t a1,
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__register_t a2 __unused, __register_t a3 __unused)
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{
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char **argv;
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int argc;
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vm_offset_t kernend;
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#ifdef FDT
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vm_offset_t dtbp;
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phandle_t chosen;
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char buf[2048]; /* early stack supposedly big enough */
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#endif
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/*
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* clear the BSS and SBSS segments, this should be first call in
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* the function
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*/
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kernend = (vm_offset_t)&end;
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memset(&edata, 0, kernend - (vm_offset_t)(&edata));
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mips_postboot_fixup();
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/* Initialize pcpu stuff */
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mips_pcpu0_init();
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/* Something to hold kernel env until kmem is available */
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init_static_kenv(boot1_env, sizeof(boot1_env));
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#ifdef FDT
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/*
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* Find the dtb passed in by the boot loader (currently fictional).
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*/
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dtbp = (vm_offset_t)NULL;
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#if defined(FDT_DTB_STATIC)
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/*
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* In case the device tree blob was not retrieved (from metadata) try
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* to use the statically embedded one.
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*/
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if (dtbp == (vm_offset_t)NULL)
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dtbp = (vm_offset_t)&fdt_static_dtb;
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#else
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#error "Non-static FDT not supported on JZ4780"
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#endif
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if (OF_install(OFW_FDT, 0) == FALSE)
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while (1);
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if (OF_init((void *)dtbp) != 0)
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while (1);
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#endif
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cninit();
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#ifdef FDT
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/*
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* Get bootargs from FDT if specified.
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*/
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chosen = OF_finddevice("/chosen");
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if (OF_getprop(chosen, "bootargs", buf, sizeof(buf)) != -1)
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boothowto |= boot_parse_cmdline(buf);
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#endif
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/* Parse cmdline from U-Boot */
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argc = a0;
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argv = (char **)a1;
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boothowto |= boot_parse_args(argc, argv);
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mips_init();
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}
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