Andriy Gapon 8f09494d1e amd-vi: clear event interrupt and overflow bits upon handling the interrupt ... This ensures that we can receive further event interrupts. See the description of the bits in the specification for MMIO Offset 2020h IOMMU Status Register. The bits are defined as set-by-hardware write-1-to-clear, same as all the bits in the status register. Discussed with: anish		2017-12-04 17:02:53 +00:00
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acpica	sys/amd64: further adoption of SPDX licensing ID tags.	2017-11-27 15:03:07 +00:00
amd64	Fix index calculation for the page table pages for efirt 1:1 map.	2017-11-28 09:34:43 +00:00
cloudabi32	Use TO_PTR() to convert integers to pointers.	2017-11-26 14:45:56 +00:00
cloudabi64	Use TO_PTR() to convert integers to pointers.	2017-11-26 14:45:56 +00:00
conf	It's time to retire AHC_REG_PRETTY_PRINT and AHD_REG_PRETTY_PRINT from	2017-11-29 23:41:49 +00:00
ia32	sys/amd64: further adoption of SPDX licensing ID tags.	2017-11-27 15:03:07 +00:00
include	sys/amd64: further adoption of SPDX licensing ID tags.	2017-11-27 15:03:07 +00:00
linux	Disable vim syntax highlighting.	2017-11-28 18:23:17 +00:00
linux32	Disable vim syntax highlighting.	2017-11-28 18:23:17 +00:00
pci	sys/amd64: further adoption of SPDX licensing ID tags.	2017-11-27 15:03:07 +00:00
sgx	Fix module unload when SGX support is not present in CPU.	2017-08-18 14:47:06 +00:00
vmm	amd-vi: clear event interrupt and overflow bits upon handling the interrupt	2017-12-04 17:02:53 +00:00
Makefile	Bring the tags and links entries for amd64 up to date.	2015-10-27 22:59:24 +00:00