8f1db961f9
where a pin assertion while a source was masked would result in the interrupt being lost, with the symptom being a console hang. The condition is now recorded, and the interrupt generated when the source is unmasked. Discovered by: OpenBSD 5.4 MP Reviewed by: neel MFC after: 3 days
379 lines
8.8 KiB
C
379 lines
8.8 KiB
C
/*-
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* Copyright (c) 2012 NetApp, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <x86/apicreg.h>
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#include <machine/vmm.h>
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#include <string.h>
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#include <assert.h>
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#include <stdbool.h>
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#include <pthread.h>
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#include <vmmapi.h>
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#include "inout.h"
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#include "mem.h"
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#include "bhyverun.h"
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#include <stdio.h>
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static uint64_t ioapic_clearpend, ioapic_togglepend, ioapic_setpend;
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#define IOAPIC_PADDR 0xFEC00000
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#define IOREGSEL 0x00
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#define IOWIN 0x10
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#define REDIR_ENTRIES 16
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#define INTR_ASSERTED(ioapic, pin) \
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((ioapic)->rtbl[(pin)].pinstate == true)
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struct ioapic {
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int inited;
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uint32_t id;
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struct {
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uint64_t reg;
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bool pinstate;
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bool pending;
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} rtbl[REDIR_ENTRIES];
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uintptr_t paddr; /* gpa where the ioapic is mapped */
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uint32_t ioregsel;
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struct memory_region *region;
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pthread_mutex_t mtx;
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};
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static struct ioapic ioapics[1]; /* only a single ioapic for now */
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static int ioapic_region_read(struct vmctx *vm, struct ioapic *ioapic,
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uintptr_t paddr, int size, uint64_t *data);
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static int ioapic_region_write(struct vmctx *vm, struct ioapic *ioapic,
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uintptr_t paddr, int size, uint64_t data);
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static int ioapic_region_handler(struct vmctx *vm, int vcpu, int dir,
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uintptr_t paddr, int size, uint64_t *val, void *arg1, long arg2);
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static void
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ioapic_set_pinstate(struct vmctx *ctx, int pin, bool newstate)
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{
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int vector, apicid, vcpu;
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uint32_t low, high;
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struct ioapic *ioapic;
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ioapic = &ioapics[0]; /* assume a single ioapic */
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/* Nothing to do if interrupt pin has not changed state */
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if (ioapic->rtbl[pin].pinstate == newstate)
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return;
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ioapic->rtbl[pin].pinstate = newstate; /* record it */
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/* Nothing to do if interrupt pin is deasserted */
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if (!INTR_ASSERTED(ioapic, pin))
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return;
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/*
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* XXX
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* We only deal with:
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* - edge triggered interrupts
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* - fixed delivery mode
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* Level-triggered sources will work so long as there is
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* no sharing.
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*/
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low = ioapic->rtbl[pin].reg;
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high = ioapic->rtbl[pin].reg >> 32;
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if ((low & IOART_INTMASK) == IOART_INTMCLR &&
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(low & IOART_DESTMOD) == IOART_DESTPHY &&
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(low & IOART_DELMOD) == IOART_DELFIXED) {
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vector = low & IOART_INTVEC;
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apicid = high >> APIC_ID_SHIFT;
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if (apicid != 0xff) {
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/* unicast */
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vcpu = vm_apicid2vcpu(ctx, apicid);
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vm_lapic_irq(ctx, vcpu, vector);
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} else {
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/* broadcast */
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vcpu = 0;
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while (vcpu < guest_ncpus) {
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vm_lapic_irq(ctx, vcpu, vector);
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vcpu++;
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}
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}
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} else if ((low & IOART_INTMASK) != IOART_INTMCLR &&
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low & IOART_TRGRLVL) {
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/*
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* For level-triggered interrupts that have been
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* masked, set the pending bit so that an interrupt
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* will be generated on unmask and if the level is
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* still asserted
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*/
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ioapic_setpend++;
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ioapic->rtbl[pin].pending = true;
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}
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}
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static void
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ioapic_set_pinstate_locked(struct vmctx *ctx, int pin, bool newstate)
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{
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struct ioapic *ioapic;
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if (pin < 0 || pin >= REDIR_ENTRIES)
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return;
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ioapic = &ioapics[0];
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pthread_mutex_lock(&ioapic->mtx);
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ioapic_set_pinstate(ctx, pin, newstate);
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pthread_mutex_unlock(&ioapic->mtx);
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}
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/*
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* External entry points require locking
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*/
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void
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ioapic_deassert_pin(struct vmctx *ctx, int pin)
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{
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ioapic_set_pinstate_locked(ctx, pin, false);
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}
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void
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ioapic_assert_pin(struct vmctx *ctx, int pin)
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{
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ioapic_set_pinstate_locked(ctx, pin, true);
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}
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void
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ioapic_init(int which)
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{
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struct mem_range memp;
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struct ioapic *ioapic;
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int error;
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int i;
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assert(which == 0);
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ioapic = &ioapics[which];
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assert(ioapic->inited == 0);
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bzero(ioapic, sizeof(struct ioapic));
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pthread_mutex_init(&ioapic->mtx, NULL);
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/* Initialize all redirection entries to mask all interrupts */
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for (i = 0; i < REDIR_ENTRIES; i++)
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ioapic->rtbl[i].reg = 0x0001000000010000UL;
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ioapic->paddr = IOAPIC_PADDR;
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/* Register emulated memory region */
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memp.name = "ioapic";
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memp.flags = MEM_F_RW;
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memp.handler = ioapic_region_handler;
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memp.arg1 = ioapic;
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memp.arg2 = which;
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memp.base = ioapic->paddr;
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memp.size = sizeof(struct IOAPIC);
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error = register_mem(&memp);
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assert (error == 0);
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ioapic->inited = 1;
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}
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static uint32_t
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ioapic_read(struct ioapic *ioapic, uint32_t addr)
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{
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int regnum, pin, rshift;
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assert(ioapic->inited);
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regnum = addr & 0xff;
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switch (regnum) {
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case IOAPIC_ID:
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return (ioapic->id);
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break;
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case IOAPIC_VER:
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return ((REDIR_ENTRIES << MAXREDIRSHIFT) | 0x11);
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break;
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case IOAPIC_ARB:
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return (ioapic->id);
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break;
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default:
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break;
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}
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/* redirection table entries */
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if (regnum >= IOAPIC_REDTBL &&
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regnum < IOAPIC_REDTBL + REDIR_ENTRIES * 2) {
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pin = (regnum - IOAPIC_REDTBL) / 2;
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if ((regnum - IOAPIC_REDTBL) % 2)
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rshift = 32;
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else
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rshift = 0;
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return (ioapic->rtbl[pin].reg >> rshift);
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}
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return (0);
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}
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static void
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ioapic_write(struct vmctx *vm, struct ioapic *ioapic, uint32_t addr,
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uint32_t data)
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{
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int regnum, pin, lshift;
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assert(ioapic->inited);
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regnum = addr & 0xff;
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switch (regnum) {
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case IOAPIC_ID:
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ioapic->id = data & APIC_ID_MASK;
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break;
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case IOAPIC_VER:
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case IOAPIC_ARB:
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/* readonly */
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break;
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default:
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break;
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}
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/* redirection table entries */
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if (regnum >= IOAPIC_REDTBL &&
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regnum < IOAPIC_REDTBL + REDIR_ENTRIES * 2) {
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pin = (regnum - IOAPIC_REDTBL) / 2;
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if ((regnum - IOAPIC_REDTBL) % 2)
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lshift = 32;
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else
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lshift = 0;
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ioapic->rtbl[pin].reg &= ~((uint64_t)0xffffffff << lshift);
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ioapic->rtbl[pin].reg |= ((uint64_t)data << lshift);
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if (ioapic->rtbl[pin].pending &&
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((ioapic->rtbl[pin].reg & IOART_INTMASK) ==
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IOART_INTMCLR)) {
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ioapic->rtbl[pin].pending = false;
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ioapic_clearpend++;
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/*
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* Inject the deferred level-triggered int if it is
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* still asserted. Simulate by toggling the pin
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* off and then on.
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*/
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if (ioapic->rtbl[pin].pinstate == true) {
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ioapic_togglepend++;
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ioapic_set_pinstate(vm, pin, false);
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ioapic_set_pinstate(vm, pin, true);
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}
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}
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}
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}
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static int
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ioapic_region_read(struct vmctx *vm, struct ioapic *ioapic, uintptr_t paddr,
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int size, uint64_t *data)
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{
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int offset;
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offset = paddr - ioapic->paddr;
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/*
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* The IOAPIC specification allows 32-bit wide accesses to the
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* IOREGSEL (offset 0) and IOWIN (offset 16) registers.
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*/
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if (size != 4 || (offset != IOREGSEL && offset != IOWIN)) {
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#if 1
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printf("invalid access to ioapic%d: size %d, offset %d\n",
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(int)(ioapic - ioapics), size, offset);
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#endif
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*data = 0;
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return (0);
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}
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if (offset == IOREGSEL)
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*data = ioapic->ioregsel;
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else
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*data = ioapic_read(ioapic, ioapic->ioregsel);
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return (0);
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}
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static int
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ioapic_region_write(struct vmctx *vm, struct ioapic *ioapic, uintptr_t paddr,
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int size, uint64_t data)
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{
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int offset;
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offset = paddr - ioapic->paddr;
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/*
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* The ioapic specification allows 32-bit wide accesses to the
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* IOREGSEL (offset 0) and IOWIN (offset 16) registers.
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*/
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if (size != 4 || (offset != IOREGSEL && offset != IOWIN)) {
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#if 1
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printf("invalid access to ioapic%d: size %d, offset %d\n",
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(int)(ioapic - ioapics), size, offset);
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#endif
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return (0);
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}
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if (offset == IOREGSEL)
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ioapic->ioregsel = data;
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else
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ioapic_write(vm, ioapic, ioapic->ioregsel, data);
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return (0);
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}
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static int
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ioapic_region_handler(struct vmctx *vm, int vcpu, int dir, uintptr_t paddr,
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int size, uint64_t *val, void *arg1, long arg2)
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{
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struct ioapic *ioapic;
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int which;
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ioapic = arg1;
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which = arg2;
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assert(ioapic == &ioapics[which]);
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pthread_mutex_lock(&ioapic->mtx);
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if (dir == MEM_F_READ)
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ioapic_region_read(vm, ioapic, paddr, size, val);
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else
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ioapic_region_write(vm, ioapic, paddr, size, *val);
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pthread_mutex_unlock(&ioapic->mtx);
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return (0);
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}
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