4f3dc90023
and casuword(9), but do not mix value read and indication of fault. I know (or remember) enough assembly to handle x86 and powerpc. For arm, mips and sparc64, implement fueword() and casueword() as wrappers around fuword() and casuword(), which means that the functions cannot distinguish between -1 and fault. On architectures where fueword() and casueword() are native, implement fuword() and casuword() using fueword() and casuword(), to reduce assembly code duplication. Sponsored by: The FreeBSD Foundation Tested by: pho MFC after: 2 weeks (ia64 needs treating)
186 lines
5.6 KiB
C
186 lines
5.6 KiB
C
/* $OpenBSD: param.h,v 1.11 1998/08/30 22:05:35 millert Exp $ */
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/*-
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* Copyright (c) 1988 University of Utah.
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department and Ralph Campbell.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: Utah Hdr: machparam.h 1.11 89/08/14
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* from: @(#)param.h 8.1 (Berkeley) 6/10/93
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* JNPR: param.h,v 1.6.2.1 2007/09/10 07:49:36 girish
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* $FreeBSD$
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*/
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#ifndef _MIPS_INCLUDE_PARAM_H_
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#define _MIPS_INCLUDE_PARAM_H_
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#include <machine/_align.h>
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#include <sys/cdefs.h>
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#ifdef _KERNEL
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#ifndef _LOCORE
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#include <machine/cpu.h>
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#endif
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#endif
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#define __PCI_REROUTE_INTERRUPT
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#ifndef MACHINE
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#define MACHINE "mips"
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#endif
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#ifndef MACHINE_ARCH
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#if _BYTE_ORDER == _BIG_ENDIAN
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#ifdef __mips_n64
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#define MACHINE_ARCH "mips64"
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#ifndef MACHINE_ARCH32
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#define MACHINE_ARCH32 "mips"
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#endif
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#elif defined(__mips_n32)
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#define MACHINE_ARCH "mipsn32"
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#else
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#define MACHINE_ARCH "mips"
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#endif
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#else
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#ifdef __mips_n64
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#define MACHINE_ARCH "mips64el"
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#ifndef MACHINE_ARCH32
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#define MACHINE_ARCH32 "mipsel"
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#endif
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#elif defined(__mips_n32)
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#define MACHINE_ARCH "mipsn32el"
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#else
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#define MACHINE_ARCH "mipsel"
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#endif
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#endif
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#endif
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/*
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* OBJFORMAT_NAMES is a comma-separated list of the object formats
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* that are supported on the architecture.
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*/
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#define OBJFORMAT_NAMES "elf"
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#define OBJFORMAT_DEFAULT "elf"
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#define MID_MACHINE 0 /* None but has to be defined */
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#ifdef SMP
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#define MAXSMPCPU 32
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#ifndef MAXCPU
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#define MAXCPU MAXSMPCPU
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#endif
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#else
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#define MAXSMPCPU 1
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#define MAXCPU 1
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#endif
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#ifndef MAXMEMDOM
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#define MAXMEMDOM 1
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#endif
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/*
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* Round p (pointer or byte index) up to a correctly-aligned value for all
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* data types (int, long, ...). The result is u_int and must be cast to
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* any desired pointer type.
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*/
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#define ALIGNBYTES _ALIGNBYTES
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#define ALIGN(p) _ALIGN(p)
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/*
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* ALIGNED_POINTER is a boolean macro that checks whether an address
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* is valid to fetch data elements of type t from on this architecture.
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* This does not reflect the optimal alignment, just the possibility
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* (within reasonable limits).
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*/
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#define ALIGNED_POINTER(p, t) ((((unsigned long)(p)) & (sizeof (t) - 1)) == 0)
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/*
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* CACHE_LINE_SIZE is the compile-time maximum cache line size for an
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* architecture. It should be used with appropriate caution.
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*/
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#define CACHE_LINE_SHIFT 6
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#define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT)
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#define PAGE_SHIFT 12 /* LOG2(PAGE_SIZE) */
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#define PAGE_SIZE (1<<PAGE_SHIFT) /* bytes/page */
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#define PAGE_MASK (PAGE_SIZE-1)
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#define NPTEPG (PAGE_SIZE/(sizeof (pt_entry_t)))
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#define NPDEPG (PAGE_SIZE/(sizeof (pd_entry_t)))
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#if defined(__mips_n32) || defined(__mips_n64) /* PHYSADDR_64_BIT */
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#define NPTEPGSHIFT 9 /* LOG2(NPTEPG) */
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#else
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#define NPTEPGSHIFT 10 /* LOG2(NPTEPG) */
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#endif
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#ifdef __mips_n64
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#define NPDEPGSHIFT 9 /* LOG2(NPTEPG) */
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#define SEGSHIFT (PAGE_SHIFT + NPTEPGSHIFT + NPDEPGSHIFT)
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#define NBSEG (1ul << SEGSHIFT)
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#define PDRSHIFT (PAGE_SHIFT + NPTEPGSHIFT)
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#define PDRMASK ((1 << PDRSHIFT) - 1)
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#else
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#define NPDEPGSHIFT 10 /* LOG2(NPTEPG) */
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#define SEGSHIFT (PAGE_SHIFT + NPTEPGSHIFT)
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#define NBSEG (1 << SEGSHIFT) /* bytes/segment */
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#define PDRSHIFT SEGSHIFT /* alias for SEG in 32 bit */
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#define PDRMASK ((1 << PDRSHIFT) - 1)
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#endif
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#define NBPDR (1 << PDRSHIFT) /* bytes/pagedir */
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#define SEGMASK (NBSEG - 1) /* byte offset into segment */
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#define MAXPAGESIZES 1 /* max supported pagesizes */
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#define MAXDUMPPGS 1 /* xxx: why is this only one? */
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/*
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* The kernel stack needs to be aligned on a (PAGE_SIZE * 2) boundary.
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*/
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#define KSTACK_PAGES 2 /* kernel stack */
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#define KSTACK_GUARD_PAGES 2 /* pages of kstack guard; 0 disables */
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/*
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* Mach derived conversion macros
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*/
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#define round_page(x) (((x) + PAGE_MASK) & ~PAGE_MASK)
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#define trunc_page(x) ((x) & ~PAGE_MASK)
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#define atop(x) ((x) >> PAGE_SHIFT)
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#define ptoa(x) ((x) << PAGE_SHIFT)
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#define pgtok(x) ((x) * (PAGE_SIZE / 1024))
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#ifdef _KERNEL
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#define NO_FUEWORD 1
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#endif
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#endif /* !_MIPS_INCLUDE_PARAM_H_ */
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