freebsd-dev/lib/libc/riscv
Ruslan Bukin af19cc59ca Support for v1.10 (latest) of RISC-V privilege specification.
New version is not compatible on supervisor mode with v1.9.1
(previous version).

Highlights:
    o BBL (Berkeley Boot Loader) provides no initial page tables
      anymore allowing us to choose VM, to build page tables manually
      and enable MMU in S-mode.
    o SBI interface changed.
    o GENERIC kernel.
      FDT is now chosen standard for RISC-V hardware description.
      DTB is now provided by Spike (golden model simulator). This
      allows us to introduce GENERIC kernel. However, description
      for console and timer devices is not provided in DTB, so move
      these devices temporary to nexus bus.
    o Supervisor can't access userspace by default. Solution is to
      set SUM (permit Supervisor User Memory access) bit in sstatus
      register.
    o Compressed extension is now turned on by default.
    o External GCC 7.1 compiler used.
    o _gp renamed to __global_pointer$
    o Compiler -march= string is now in use allowing us to choose
      required extensions (compressed, FPU, atomic, etc).

Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D11800
2017-08-10 14:18:09 +00:00
..
gen Support for v1.10 (latest) of RISC-V privilege specification. 2017-08-10 14:18:09 +00:00
softfloat Add full softfloat and hardfloat support for RISC-V. 2016-11-16 15:21:32 +00:00
sys Use unconditional jr (jump register) so cerror relocation offset fits. 2017-04-27 22:40:39 +00:00
_fpmath.h
arith.h
gd_qnan.h
Makefile.inc Correct an misunderstanding of MDSRCS. 2017-03-02 17:07:28 +00:00
Symbol.map Add full softfloat and hardfloat support for RISC-V. 2016-11-16 15:21:32 +00:00
SYS.h Use unconditional jr (jump register) so cerror relocation offset fits. 2017-04-27 22:40:39 +00:00