9062e0e85d
Well, better late than newer, but things has been hectic
around here, sorry for the long delay.
DMA support has been added to the ATA disk driver.
This only works on Intel PIIX3/4, Acer Aladdin and Promise controllers.
The promise support works without the BIOS on the board,
and timing modes are set to support up to UDMA speed. This
solves the problems with having more than one promise controller
in the same system.
There is support for "generic" DMA, that might work on other
controllers, but now you have been warned :)
More chipset specific code will come soon, I have to find testers
with the approbiate HW, more on that when I have it ready.
The system now uses its own major numbers, please run MAKEDEV
with the devices you need (ad?, acd?, afd?, ast?).
For now the disk driver will also attach to the old wd major
so one can at least boot without this step, but be warned, this
will eventually go away. The bootblocks will have to be changed
before one can boot directly from an "ad" device though.
Fixed problems:
All known hang problems should be solved
The probe code has been sligthly changed, this should solve
the reports I have lying around (I hope).
Hangs when accessing ata & atapi device on the same channel simultaniously.
A real braino in ata_start caused this, fixed.
As usual USE AT YOUR OWN RISK!!, this is still pre alpha level code.
Especially the DMA support can hose your disk real bad if anything
goes wrong, agaiin you have been warned :)
But please tell me how it works for you!
Enjoy!
-Søren
367 lines
11 KiB
C
367 lines
11 KiB
C
/*-
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* Copyright (c) 1998,1999 Søren Schmidt
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id$
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*/
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#include "ata.h"
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#if NATA > 0
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#include "pci.h"
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#if NPCI > 0
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/buf.h>
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#include <sys/malloc.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <pci/pcivar.h>
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#include <pci/pcireg.h>
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#include <dev/ata/ata-all.h>
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/* misc defines */
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#define MIN(a,b) ((a)>(b)?(b):(a))
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int32_t
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ata_dmainit(struct ata_softc *scp, int32_t device,
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int32_t apiomode, int32_t wdmamode, int32_t udmamode)
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{
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int32_t type, devno, error;
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void *dmatab;
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if (!scp->bmaddr)
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return -1;
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#ifdef ATA_DEBUGDMA
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printf("ata%d: dmainit: ioaddr=0x%x altioaddr=0x%x, bmaddr=0x%x\n",
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scp->lun, scp->ioaddr, scp->altioaddr, scp->bmaddr);
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#endif
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if (!(dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT)))
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return -1;
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if (((int)dmatab>>PAGE_SHIFT)^(((int)dmatab+PAGE_SIZE-1)>>PAGE_SHIFT)) {
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printf("ata_dmainit: dmatab crosses page boundary, no DMA\n");
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free(dmatab, M_DEVBUF);
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return -1;
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}
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scp->dmatab[device ? 1 : 0] = dmatab;
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type = pci_conf_read(scp->tag, PCI_ID_REG);
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switch(type) {
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case 0x71118086: /* Intel PIIX4 */
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if (udmamode >= 2) {
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int32_t mask48, new48;
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printf("ata%d: %s: settting up UDMA2 mode on PIIX4 chip ",
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scp->lun, (device) ? "slave" : "master");
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
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if (error) {
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printf("failed\n");
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break;
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}
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printf("OK\n");
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devno = (scp->unit << 1) + (device) ? 1 : 0;
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mask48 = (1 << devno) + (3 << (16 + (devno << 2)));
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new48 = (1 << devno) + (2 << (16 + (devno << 2)));
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pci_conf_write(scp->tag, 0x48,
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(pci_conf_read(scp->tag, 0x48) & ~mask48) | new48);
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return 0;
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}
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/* FALLTHROUGH */
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case 0x70108086: /* Intel PIIX3 */
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if (wdmamode >= 2 && apiomode >= 4) {
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int32_t mask40, new40, mask44, new44;
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/* if SITRE not set doit for both channels */
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if (!((pci_conf_read(scp->tag, 0x40) >> (scp->unit<<8)) & 0x4000)) {
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new40 = pci_conf_read(scp->tag, 0x40);
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new44 = pci_conf_read(scp->tag, 0x44);
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if (!(new40 & 0x00004000)) {
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new44 &= ~0x0000000f;
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new44 |= ((new40&0x00003000)>>10)|((new40&0x00000300)>>8);
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}
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if (!(new40 & 0x40000000)) {
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new44 &= ~0x000000f0;
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new44 |= ((new40&0x30000000)>>22)|((new40&0x03000000)>>20);
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}
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new40 |= 0x40004000;
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pci_conf_write(scp->tag, 0x40, new40);
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pci_conf_write(scp->tag, 0x44, new44);
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}
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printf("ata%d: %s: settting up WDMA2 mode on PIIX3/4 chip ",
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scp->lun, (device) ? "slave" : "master");
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
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if (error) {
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printf("failed\n");
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break;
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}
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printf("OK\n");
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if (device == ATA_MASTER) {
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mask40 = 0x0000330f;
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new40 = 0x00002307;
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mask44 = 0;
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new44 = 0;
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} else {
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mask40 = 0x000000f0;
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new40 = 0x00000070;
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mask44 = 0x0000000f;
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new44 = 0x0000000b;
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}
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if (scp->unit) {
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mask40 <<= 16;
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new40 <<= 16;
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mask44 <<= 4;
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new44 <<= 4;
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}
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pci_conf_write(scp->tag, 0x40,
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(pci_conf_read(scp->tag, 0x40) & ~mask40) | new40);
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pci_conf_write(scp->tag, 0x44,
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(pci_conf_read(scp->tag, 0x44) & ~mask44) | new44);
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return 0;
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}
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break;
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case 0x12308086: /* Intel PIIX */
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/* probably not worth the trouble */
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break;
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case 0x4d33105a: /* Promise Ultra/33 / FastTrack controllers */
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devno = (scp->unit << 1) + (device) ? 1 : 0;
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if (udmamode >=2) {
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outb(scp->bmaddr + 0x1f, inb(scp->bmaddr + 0x1f) | 0x01);
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pci_conf_write(scp->tag, 0x60 + (devno << 2), 0x004127f3);
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printf("ata%d: %s: settting up UDMA2 mode on Promise chip ",
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scp->lun, (device) ? "slave" : "master");
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
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if (error) {
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printf("failed\n");
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break;
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}
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printf("OK\n");
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}
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else if (wdmamode >= 2 && apiomode >= 4) {
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outb(scp->bmaddr + 0x1f, inb(scp->bmaddr + 0x1f) | 0x01);
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pci_conf_write(scp->tag, 0x60 + (devno << 2), 0x004367f3);
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printf("ata%d: %s: settting up WDMA2 mode on Promise chip ",
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scp->lun, (device) ? "slave" : "master");
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
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if (error) {
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printf("failed\n");
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break;
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}
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printf("OK\n");
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}
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else {
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pci_conf_write(scp->tag, 0x60 + (devno << 2), 0x004fe924);
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printf("ata%d: %s: settting up PIO mode on Promise chip OK\n",
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scp->lun, (device) ? "slave" : "master");
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}
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break;
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case 0x522910b9: /* AcerLabs Aladdin IV/V */
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if (udmamode >=2) {
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int32_t word54 = pci_conf_read(scp->tag, 0x54);
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printf("ata%d: %s: settting up UDMA2 mode on Aladdin chip ",
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scp->lun, (device) ? "slave" : "master");
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_UDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
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if (error) {
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printf("failed\n");
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break;
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}
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printf("OK\n");
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word54 |= 0x5555;
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word54 |= (0x0000000A << (16 + (scp->unit << 3) + (device << 2)));
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pci_conf_write(scp->tag, 0x54, word54);
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return 0;
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}
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else if (wdmamode >= 2 && apiomode >= 4) {
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printf("ata%d: %s: settting up WDMA2 mode on Aladdin chip ",
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scp->lun, (device) ? "slave" : "master");
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
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if (error) {
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printf("failed\n");
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break;
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}
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printf("OK\n");
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return 0;
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}
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break;
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default: /* well, we have no support for this, but try anyways */
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if ((wdmamode >= 2 && apiomode >= 4) || udmamode >= 2) {
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printf("ata%d: %s: settting up generic WDMA2 mode ",
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scp->lun, (device) ? "slave" : "master");
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error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
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ATA_WDMA2, ATA_C_FEA_SETXFER, ATA_WAIT_INTR);
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if (error) {
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printf("failed\n");
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break;
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}
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printf("OK\n");
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return 0;
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}
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}
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free(dmatab, M_DEVBUF);
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return -1;
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}
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int32_t
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ata_dmasetup(struct ata_softc *scp, int32_t device,
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int8_t *data, int32_t count, int32_t flags)
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{
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struct ata_dmaentry *dmatab;
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u_int32_t dma_count, dma_base;
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int32_t i = 0;
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#ifdef ATA_DEBUGDMA
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printf("ata%d: dmasetup\n", scp->lun);
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#endif
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if (((u_int32_t)data & 1) || (count & 1))
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return -1;
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if (!count) {
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printf("ata%d: zero length DMA transfer attempt on %s\n",
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scp->lun, (device ? "slave" : "master"));
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return -1;
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}
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dmatab = scp->dmatab[device ? 1 : 0];
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dma_base = vtophys(data);
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dma_count = MIN(count, (PAGE_SIZE - ((u_int32_t)data & PAGE_MASK)));
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data += dma_count;
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count -= dma_count;
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while (count) {
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dmatab[i].base = dma_base;
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dmatab[i].count = (dma_count & 0xffff);
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i++;
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if (i >= ATA_DMA_ENTRIES) {
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printf("ata%d: too many segments in DMA table for %s\n",
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scp->lun, (device ? "slave" : "master"));
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return -1;
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}
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dma_base = vtophys(data);
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dma_count = MIN(count, PAGE_SIZE);
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data += MIN(count, PAGE_SIZE);
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count -= MIN(count, PAGE_SIZE);
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}
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#ifdef ATA_DEBUGDMA
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printf("ata_dmasetup: base=%08x count%08x\n",
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dma_base, dma_count);
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#endif
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dmatab[i].base = dma_base;
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dmatab[i].count = (dma_count & 0xffff) | ATA_DMA_EOT;
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outl(scp->bmaddr + ATA_BMDTP_PORT, vtophys(dmatab));
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#ifdef ATA_DEBUGDMA
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printf("dmatab=%08x %08x\n", vtophys(dmatab), inl(scp->bmaddr+ATA_BMDTP_PORT));
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#endif
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outb(scp->bmaddr + ATA_BMCMD_PORT, flags ? ATA_BMCMD_WRITE_READ:0);
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outb(scp->bmaddr + ATA_BMSTAT_PORT, (inb(scp->bmaddr + ATA_BMSTAT_PORT) |
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(ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
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return 0;
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}
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void
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ata_dmastart(struct ata_softc *scp, int32_t device)
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{
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#ifdef ATA_DEBUGDMA
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printf("ata%d: dmastart\n", scp->lun);
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#endif
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outb(scp->bmaddr + ATA_BMCMD_PORT,
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inb(scp->bmaddr + ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP);
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}
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int32_t
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ata_dmadone(struct ata_softc *scp, int32_t device)
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{
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#ifdef ATA_DEBUGDMA
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printf("ata%d: dmadone\n", scp->lun);
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#endif
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outb(scp->bmaddr + ATA_BMCMD_PORT,
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inb(scp->bmaddr + ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
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return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
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}
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int32_t
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ata_dmastatus(struct ata_softc *scp, int32_t device)
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{
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#ifdef ATA_DEBUGDMA
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printf("ata%d: dmastatus\n", scp->lun);
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#endif
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return inb(scp->bmaddr + ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
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}
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#else /* NPCI > 0 */
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int32_t
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ata_dmainit(struct ata_softc *scp, int32_t device,
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int32_t piomode, int32_t wdmamode, int32_t udmamode)
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{
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return -1;
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}
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int32_t
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ata_dmasetup(struct ata_softc *scp, int32_t device,
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int8_t *data, int32_t count, int32_t flags)
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{
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return -1;
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}
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void
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ata_dmastart(struct ata_softc *scp, int32_t device)
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{
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}
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int32_t
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ata_dmadone(struct ata_softc *scp, int32_t device)
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{
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return -1;
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}
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int32_t
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ata_dmastatus(struct ata_softc *scp, int32_t device)
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{
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return -1;
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}
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#endif /* NPCI > 0 */
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#endif /* NATA > 0 */
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