Conrad Meyer 2744a0b69b Drop CACHE_LINE_SIZE to 64 bytes on x86 ... The actual cache line size has always been 64 bytes. The 128 number arose as an optimization for Core 2 era Intel processors. By default (configurable in BIOS), these CPUs would prefetch adjacent cache lines unintelligently. Newer CPUs prefetch more intelligently. The latest Core 2 era CPU was introduced in September 2008 (Xeon 7400 series, "Dunnington"). If you are still using one of these CPUs, especially in a multi-socket configuration, consider locating the "adjacent cache line prefetch" option in BIOS and disabling it. Reported by: mjg Reviewed by: np Discussed with: jhb Sponsored by: Dell EMC Isilon		2017-08-28 22:28:41 +00:00
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pc
xen
_align.h
_bus.h
_inttypes.h
_limits.h
_stdint.h
_types.h
acpica_machdep.h
apm_bios.h
asm.h	Renumber copyright clause 4	2017-02-28 23:42:47 +00:00
asmacros.h	Make WRFSBASE and WRGSBASE instructions functional.	2017-08-21 17:38:02 +00:00
atomic.h	- Remove 'struct vmmeter' from 'struct pcpu', leaving only global vmmeter	2017-04-17 17:34:47 +00:00
bus_dma.h	Clean up MD pollution of bus_dma.h:	2017-07-01 05:35:29 +00:00
bus.h
clock.h
counter.h	- Remove 'struct vmmeter' from 'struct pcpu', leaving only global vmmeter	2017-04-17 17:34:47 +00:00
cpu.h	Renumber copyright clause 4	2017-02-28 23:42:47 +00:00
cpufunc.h	Add support for Intel Software Guard Extensions (Intel SGX).	2017-08-16 10:38:06 +00:00
cputypes.h
db_machdep.h	Fix printing of negative offsets (typically from frame pointers) again.	2017-03-26 18:46:35 +00:00
dump.h
efi.h	Fail to open efirt device when no EFI on system.	2017-08-08 20:44:16 +00:00
elf.h
endian.h
exec.h	Renumber copyright clause 4	2017-02-28 23:42:47 +00:00
fdt.h
float.h
floatingpoint.h
fpu.h	Renumber copyright clause 4	2017-02-28 23:42:47 +00:00
frame.h
gdb_machdep.h
ieeefp.h
in_cksum.h
intr_machdep.h	x86: Add dynamic interrupt rebalancing	2017-08-16 18:48:53 +00:00
iodev.h
kdb.h
limits.h	Renumber copyright clause 4	2017-02-28 23:42:47 +00:00
md_var.h	Lower the amd64 shared page, which contains the signal trampoline,	2017-08-02 01:43:35 +00:00
memdev.h
metadata.h
minidump.h
mp_watchdog.h
nexusvar.h
npx.h
ofw_machdep.h
param.h	Drop CACHE_LINE_SIZE to 64 bytes on x86	2017-08-28 22:28:41 +00:00
pcb.h	Make WRFSBASE and WRGSBASE instructions functional.	2017-08-21 17:38:02 +00:00
pci_cfgreg.h
pcpu.h	- Remove 'struct vmmeter' from 'struct pcpu', leaving only global vmmeter	2017-04-17 17:34:47 +00:00
pmap.h	Add support for pmap_enter(..., psind=1) to the amd64 pmap. In other words,	2017-07-23 06:33:58 +00:00
pmc_mdep.h
ppireg.h
proc.h	Make struct syscall_args visible to userspace compilation environment	2017-06-12 20:53:44 +00:00
profile.h	Renumber copyright clause 4	2017-02-28 23:42:47 +00:00
psl.h
ptrace.h
pvclock.h
reg.h
reloc.h	Renumber copyright clause 4	2017-02-28 23:42:47 +00:00
resource.h
runq.h
segments.h	Renumber copyright clause 4	2017-02-28 23:42:47 +00:00
setjmp.h
sf_buf.h
sgx.h	Add support for Intel Software Guard Extensions (Intel SGX).	2017-08-16 10:38:06 +00:00
sgxreg.h	Add support for Intel Software Guard Extensions (Intel SGX).	2017-08-16 10:38:06 +00:00
sigframe.h
signal.h
smp.h
specialreg.h
stack.h
stdarg.h
sysarch.h
timerreg.h
trap.h
tss.h	Renumber copyright clause 4	2017-02-28 23:42:47 +00:00
ucontext.h
varargs.h
vdso.h
vm.h
vmm_dev.h
vmm_instruction_emul.h
vmm.h
vmparam.h	Bump default MAXTSIZ (kern.maxtsiz) from 128MB to 32GB. The old limit	2017-05-17 08:38:41 +00:00