131 lines
3.4 KiB
Plaintext
131 lines
3.4 KiB
Plaintext
# $FreeBSD$
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# This is a placeholder until the hardware support is complete.
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# mdiobus0 on arge0
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hint.argemdio.0.at="nexus0"
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hint.argemdio.0.maddr=0x19000000
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hint.argemdio.0.msize=0x1000
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hint.argemdio.0.order=0
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# DIR-825C1 GMAC configuration
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# + AR934X_ETH_CFG_RGMII_GMAC0 (1 << 0)
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# Onboard AR9344 10/100 switch is not wired up
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hint.ar934x_gmac.0.gmac_cfg=0x1
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# GMAC0 here - connected to an AR8327
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hint.arswitch.0.at="mdio0"
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hint.arswitch.0.is_7240=0
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hint.arswitch.0.is_9340=0 # not the internal switch!
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hint.arswitch.0.numphys=5
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hint.arswitch.0.phy4cpu=0
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hint.arswitch.0.is_rgmii=1
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hint.arswitch.0.is_gmii=0
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# Other AR8327 configuration parameters
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# AR8327_PAD_MAC_RGMII
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hint.arswitch.0.pad.0.mode=6
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hint.arswitch.0.pad.0.txclk_delay_en=1
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hint.arswitch.0.pad.0.rxclk_delay_en=1
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# AR8327_CLK_DELAY_SEL1
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hint.arswitch.0.pad.0.txclk_delay_sel=1
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# AR8327_CLK_DELAY_SEL2
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hint.arswitch.0.pad.0.rxclk_delay_sel=2
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# XXX there's no LED management just yet!
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hint.arswitch.0.led.ctrl0=0x00000000
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hint.arswitch.0.led.ctrl1=0xc737c737
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hint.arswitch.0.led.ctrl2=0x00000000
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hint.arswitch.0.led.ctrl3=0x00c30c00
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hint.arswitch.0.led.open_drain=1
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# force_link=1 is required for the rest of the parameters
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# to be configured.
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hint.arswitch.0.port.0.force_link=1
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hint.arswitch.0.port.0.speed=1000
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hint.arswitch.0.port.0.duplex=1
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hint.arswitch.0.port.0.txpause=1
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hint.arswitch.0.port.0.rxpause=1
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# XXX OpenWRT DB120 BSP doesn't have media/duplex set?
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hint.arge.0.phymask=0x0
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hint.arge.0.media=1000
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hint.arge.0.fduplex=1
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hint.arge.0.miimode=3 # RGMII
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hint.arge.0.pll_1000=0x06000000
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# ath0: Where the ART is - last 64k in the flash
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hint.ath.0.eepromaddr=0x1fff0000
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hint.ath.0.eepromsize=16384
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# ath1: it's different; it's a PCIe attached device, so
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# we instead need to teach the PCIe bridge code about it
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# (ie, the 'early pci fixup' stuff that programs the PCIe
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# host registers on the NIC) and then we teach ath where
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# to find it.
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# ath1 hint - pcie slot 0
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hint.pcib.0.bus.0.0.0.ath_fixup_addr=0x1fff4000
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hint.pcib.0.bus.0.0.0.ath_fixup_size=16384
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# ath0 - eeprom comes from here
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hint.ath.1.eeprom_firmware="pcib.0.bus.0.0.0.eeprom_firmware"
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# flash layout:
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# m25p80 spi0.0: mx25l12805d (16384 Kbytes)
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#
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# uBoot firmware variables:
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# bootargs=console=ttyS0,115200 root=31:02 rootfstype=jffs2 init=/sbin/init
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# mtdparts=ath-nor0:256k(u-boot),64k(u-boot-env),6336k(rootfs),1408k(uImage),64k(mib0),64k(ART)
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# 64KiB u-boot
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hint.map.0.at="flash/spi0"
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hint.map.0.start=0x00000000
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hint.map.0.end= 0x00010000
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hint.map.0.name="u-boot"
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hint.map.0.readonly=1
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# 64KiB u-boot-env
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hint.map.1.at="flash/spi0"
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hint.map.1.start=0x00010000
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hint.map.1.end= 0x00020000
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hint.map.1.name="u-boot-env"
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hint.map.1.readonly=1
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# 1344KiB kernel
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hint.map.2.at="flash/spi0"
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hint.map.2.start=0x00020000
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hint.map.2.end="search:0x00100000:0x10000:.!/bin/sh"
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hint.map.2.name="kernel"
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hint.map.2.readonly=1
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# 14592KiB rootfs
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hint.map.3.at="flash/spi0"
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hint.map.3.start="search:0x00100000:0x10000:.!/bin/sh"
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hint.map.3.end=0x00fb0000
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hint.map.3.name="rootfs"
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hint.map.3.readonly=1
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# 192KiB lang -- remapped to cfg
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hint.map.4.at="flash/spi0"
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hint.map.4.start=0x00fb0000
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hint.map.4.end= 0x00fe0000
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hint.map.4.name="cfg"
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hint.map.4.readonly=0
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# 64KiB mac
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hint.map.5.at="flash/spi0"
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hint.map.5.start=0x00fe0000
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hint.map.5.end= 0x00ff0000
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hint.map.5.name="mac"
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hint.map.5.readonly=1
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# 64KiB art
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hint.map.6.at="flash/spi0"
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hint.map.6.start=0x00ff0000
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hint.map.6.end= 0x01000000
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hint.map.6.name="art"
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hint.map.6.readonly=1
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