a1f8ad145e
applied to our copy of llvm/clang. These can be applied in alphabetical order to a pristine llvm/clang 3.4 release source tree, to result in the same version used in FreeBSD. This is intended to clearly document all the changes until now, which mostly consist of cherry pickings from the respective upstream trunks, plus a number of hand-written FreeBSD-specific ones. Hopefully those can eventually be cleaned up and sent upstream too. MFC after: 1 week X-MFC-With: r263313
80 lines
2.5 KiB
Diff
80 lines
2.5 KiB
Diff
This patch applies a workaround for an ARM EABI issue, where clang would
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sometimes incorrectly align the stack in a leaf function that uses TLS.
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Introduced here: http://svn.freebsd.org/changeset/base/252503
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Index: test/CodeGen/Thumb2/large-stack.ll
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===================================================================
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--- test/CodeGen/Thumb2/large-stack.ll
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+++ test/CodeGen/Thumb2/large-stack.ll
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@@ -13,7 +13,7 @@ define void @test1() {
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define void @test2() {
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; DARWIN-LABEL: test2:
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; DARWIN: sub.w sp, sp, #4160
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-; DARWIN: sub sp, #8
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+; DARWIN: sub sp, #12
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; LINUX-LABEL: test2:
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; LINUX: sub.w sp, sp, #4160
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; LINUX: sub sp, #8
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Index: test/CodeGen/ARM/2009-10-30.ll
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===================================================================
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--- test/CodeGen/ARM/2009-10-30.ll
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+++ test/CodeGen/ARM/2009-10-30.ll
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@@ -4,9 +4,10 @@
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define void @f(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, ...) {
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entry:
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-;CHECK: sub sp, sp, #4
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-;CHECK: add r{{[0-9]+}}, sp, #8
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-;CHECK: str r{{[0-9]+}}, [sp], #4
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+;CHECK: sub sp, sp, #8
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+;CHECK: add r{{[0-9]+}}, sp, #12
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+;CHECK: str r{{[0-9]+}}, [sp, #4]
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+;CHECK: add sp, sp, #8
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;CHECK: bx lr
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%ap = alloca i8*, align 4
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%ap1 = bitcast i8** %ap to i8*
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Index: test/CodeGen/ARM/vargs_align.ll
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===================================================================
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--- test/CodeGen/ARM/vargs_align.ll
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+++ test/CodeGen/ARM/vargs_align.ll
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@@ -15,8 +15,8 @@ entry:
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return: ; preds = %entry
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%retval2 = load i32* %retval ; <i32> [#uses=1]
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ret i32 %retval2
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-; EABI: add sp, sp, #12
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; EABI: add sp, sp, #16
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+; EABI: add sp, sp, #16
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+; OABI: add sp, sp, #16
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; OABI: add sp, sp, #12
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-; OABI: add sp, sp, #12
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}
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Index: test/CodeGen/ARM/prefetch-thumb.ll
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===================================================================
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--- test/CodeGen/ARM/prefetch-thumb.ll
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+++ test/CodeGen/ARM/prefetch-thumb.ll
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@@ -10,8 +10,8 @@ entry:
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;ARM: pld [sp, #50]
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;THUMB2: t6:
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-;THUMB2: pld [sp]
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-;THUMB2: pld [sp, #50]
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+;THUMB2: pld [sp, #4]
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+;THUMB2: pld [sp, #54]
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%red = alloca [100 x i8], align 1
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%0 = getelementptr inbounds [100 x i8]* %red, i32 0, i32 0
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Index: lib/Target/ARM/ARMFrameLowering.h
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===================================================================
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--- lib/Target/ARM/ARMFrameLowering.h
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+++ lib/Target/ARM/ARMFrameLowering.h
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@@ -27,7 +27,7 @@ class ARMFrameLowering : public TargetFrameLowerin
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public:
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explicit ARMFrameLowering(const ARMSubtarget &sti)
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- : TargetFrameLowering(StackGrowsDown, sti.getStackAlignment(), 0, 4),
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+ : TargetFrameLowering(StackGrowsDown, sti.getStackAlignment(), 0, 8),
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STI(sti) {
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}
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