89f8f24077
This revision suggests dtsi patches to be used with the original OpenWRT dtsi files so we can re-use what has already been done in OpenWRT for the Mediatek/Ralink SoCs. The only thing that is required after importing this revision should be the following: 1. Import OpenWRT dts/dtsi files into sys/gnu/dts/mips 2. Run the following script in sys/gnu/dts/mips: for f in `ls [mr]t*.dtsi`; do printf "\n#include <fbsd-$f>\n" > $f done This will apply our dtsi patches to OpenWRT's dtsi files and will allow us to re-use dts/dtsi files for ~170 Mediatek/Ralink boards. Currently our drivers are not 100% compatible with OpenWRT's dts files, but they're compatible enough. We can add more functionality in the future that would better leverage the OpenWRT work as well. Approved by: adrian (mentor) Sponsored by: Smartcom - Bulgaria AD Differential Revision: https://reviews.freebsd.org/D5965
89 lines
1.7 KiB
Plaintext
89 lines
1.7 KiB
Plaintext
/* $FreeBSD$ */
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/ {
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/*
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* FreeBSD's stdin and stdout, so we can have a console
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*/
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chosen {
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stdin = &uartlite;
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stdout = &uartlite;
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};
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/*
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* OpenWRT doesn't define a clock controller, but we currently need one
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*/
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clkctrl: cltctrl {
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compatible = "ralink,rt2880-clock";
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#clock-cells = <1>;
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};
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palmbus@10000000 {
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/*
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* Make palmbus compatible to our simplebus
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*/
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compatible = "simple-bus";
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/*
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* Reference uart2@e00 as uartlite, so we can address it
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* within the chosen node above
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*/
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uartlite: uart2@e00 {
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/*
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* Mark uartlite as compatible to mtk,ns16550a instead
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* of simply ns16550a so we can autodetect the UART
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* clock
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*/
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compatible = "mtk,ns16550a";
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};
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gpio@600 {
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/*
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* Mark gpio as compatible to simple-bus and override
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* its #size-cells and provide a default ranges property
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* so we can attach instances of our mtk_gpio_v2 driver
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* to it for now. Provide exactly the same resources to
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* the instances of mtk_gpio_v2.
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*/
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compatible = "simple-bus";
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ranges = <0x0 0x600 0x100>;
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#size-cells = <1>;
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gpio0: bank@0 {
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reg = <0x0 0x100>;
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interrupts = <6>;
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};
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gpio1: bank@1 {
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reg = <0x0 0x100>;
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interrupts = <6>;
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};
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gpio2: bank@2 {
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reg = <0x0 0x100>;
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interrupts = <6>;
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};
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};
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};
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usbphy: usbphy@10120000 {
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clocks = <&clkctrl 22 &clkctrl 25>;
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clock-names = "host", "device";
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};
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pcie@10140000 {
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/*
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* Our driver is different that OpenWRT's, so we need slightly
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* different values for the reg property
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*/
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reg = <0x10140000 0x10000>;
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/*
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* Also, we need resets and clocks defined, so we can properly
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* initialize the PCIe
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*/
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resets = <&rstctrl 26>, <&rstctrl 27>;
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clocks = <&clkctrl 26>, <&clkctrl 27>;
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};
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};
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