384 lines
9.6 KiB
ArmAsm
384 lines
9.6 KiB
ArmAsm
/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "opt_npx.h"
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#include <machine/asmacros.h>
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#ifdef SMP
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#include <machine/apic.h>
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#include <machine/smptests.h> /* CHEAP_TPR, GRAB_LOPRIO */
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#endif
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#include "assym.s"
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/*****************************************************************************/
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/* Scheduling */
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/*****************************************************************************/
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.data
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.globl panic
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#ifdef SWTCH_OPTIM_STATS
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.globl swtch_optim_stats, tlb_flush_count
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swtch_optim_stats: .long 0 /* number of _swtch_optims */
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tlb_flush_count: .long 0
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#endif
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.text
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/*
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* cpu_throw()
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*
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* This is the second half of cpu_swtch(). It is used when the current
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* thread is either a dummy or slated to die, and we no longer care
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* about its state.
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*/
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ENTRY(cpu_throw)
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jmp sw1
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/*
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* cpu_switch()
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*
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* Save the current thread state, then select the next thread to run
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* and load its state.
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*/
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ENTRY(cpu_switch)
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/* Switch to new thread. First, save context as needed. */
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movl PCPU(CURTHREAD),%ecx
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/* If no thread to save, don't save it (XXX shouldn't happen). */
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testl %ecx,%ecx
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jz sw1
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movl TD_PROC(%ecx), %eax
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movl P_VMSPACE(%eax), %edx
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movl PCPU(CPUID), %eax
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btrl %eax, VM_PMAP+PM_ACTIVE(%edx)
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movl TD_PCB(%ecx),%edx
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movl (%esp),%eax /* Hardware registers */
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movl %eax,PCB_EIP(%edx)
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movl %ebx,PCB_EBX(%edx)
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movl %esp,PCB_ESP(%edx)
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movl %ebp,PCB_EBP(%edx)
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movl %esi,PCB_ESI(%edx)
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movl %edi,PCB_EDI(%edx)
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movl %gs,PCB_GS(%edx)
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pushfl /* PSL */
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popl PCB_PSL(%edx)
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/* Test if debug registers should be saved. */
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testl $PCB_DBREGS,PCB_FLAGS(%edx)
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jz 1f /* no, skip over */
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movl %dr7,%eax /* yes, do the save */
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movl %eax,PCB_DR7(%edx)
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andl $0x0000fc00, %eax /* disable all watchpoints */
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movl %eax,%dr7
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movl %dr6,%eax
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movl %eax,PCB_DR6(%edx)
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movl %dr3,%eax
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movl %eax,PCB_DR3(%edx)
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movl %dr2,%eax
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movl %eax,PCB_DR2(%edx)
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movl %dr1,%eax
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movl %eax,PCB_DR1(%edx)
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movl %dr0,%eax
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movl %eax,PCB_DR0(%edx)
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1:
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#ifdef SMP
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/* XXX FIXME: we should be saving the local APIC TPR */
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#endif
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#ifdef DEV_NPX
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/* have we used fp, and need a save? */
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cmpl %ecx,PCPU(FPCURTHREAD)
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jne 1f
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addl $PCB_SAVEFPU,%edx /* h/w bugs make saving complicated */
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pushl %edx
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call npxsave /* do it in a big C function */
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popl %eax
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1:
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#endif
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/* Save is done. Now choose a new thread. */
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/* XXX still trashing space above the old "Top Of Stack". */
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sw1:
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#ifdef SMP
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/*
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* Stop scheduling if smp_active has become zero (for rebooting) and
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* we are not the BSP.
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*/
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cmpl $0,smp_active
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jne 1f
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cmpl $0,PCPU(CPUID)
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je 1f
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movl PCPU(IDLETHREAD), %eax
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jmp sw1b
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1:
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#endif
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/*
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* Choose a new thread to schedule. choosethread() returns idlethread
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* if it cannot find another thread to run.
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*/
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call choosethread /* Trash ecx, edx; ret eax. */
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#ifdef INVARIANTS
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testl %eax,%eax /* no thread? */
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jz badsw3 /* no, panic */
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#endif
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sw1b:
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movl %eax,%ecx
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movl TD_PCB(%ecx),%edx
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#ifdef SWTCH_OPTIM_STATS
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incl swtch_optim_stats
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#endif
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/* switch address space */
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movl %cr3,%ebx /* The same address space? */
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cmpl PCB_CR3(%edx),%ebx
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je 4f /* Yes, skip all that cruft */
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#ifdef SWTCH_OPTIM_STATS
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decl swtch_optim_stats
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incl tlb_flush_count
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#endif
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movl PCB_CR3(%edx),%ebx /* Tell the CPU about the */
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movl %ebx,%cr3 /* new address space */
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4:
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movl PCPU(CPUID), %esi
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cmpl $0, PCB_EXT(%edx) /* has pcb extension? */
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je 1f /* If not, use the default */
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btsl %esi, private_tss /* mark use of private tss */
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movl PCB_EXT(%edx), %edi /* new tss descriptor */
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jmp 2f /* Load it up */
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1: /*
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* Use the common default TSS instead of our own.
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* Set our stack pointer into the TSS, it's set to just
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* below the PCB. In C, common_tss.tss_esp0 = &pcb - 16;
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*/
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leal -16(%edx), %ebx /* leave space for vm86 */
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movl %ebx, PCPU(COMMON_TSS) + TSS_ESP0
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/*
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* Test this CPU's bit in the bitmap to see if this
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* CPU was using a private TSS.
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*/
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btrl %esi, private_tss /* Already using the common? */
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jae 3f /* if so, skip reloading */
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PCPU_ADDR(COMMON_TSSD, %edi)
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2:
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/* Move correct tss descriptor into GDT slot, then reload tr. */
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movl PCPU(TSS_GDT), %ebx /* entry in GDT */
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movl 0(%edi), %eax
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movl %eax, 0(%ebx)
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movl 4(%edi), %eax
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movl %eax, 4(%ebx)
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movl $GPROC0_SEL*8, %esi /* GSEL(entry, SEL_KPL) */
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ltr %si
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3:
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/* Note in vmspace that this cpu is using it. */
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movl TD_PROC(%ecx),%eax
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movl P_VMSPACE(%eax), %ebx
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movl PCPU(CPUID), %eax
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btsl %eax, VM_PMAP+PM_ACTIVE(%ebx)
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/* Restore context. */
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movl PCB_EBX(%edx),%ebx
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movl PCB_ESP(%edx),%esp
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movl PCB_EBP(%edx),%ebp
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movl PCB_ESI(%edx),%esi
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movl PCB_EDI(%edx),%edi
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movl PCB_EIP(%edx),%eax
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movl %eax,(%esp)
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pushl PCB_PSL(%edx)
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popfl
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#if defined(SMP) && defined(GRAB_LOPRIO)
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/* Hold LOPRIO for interrupts. */
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#ifdef CHEAP_TPR
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movl $0, lapic+LA_TPR
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#else
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andl $~APIC_TPR_PRIO, lapic+LA_TPR
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#endif
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#endif
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movl %edx, PCPU(CURPCB)
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movl %ecx, PCPU(CURTHREAD) /* into next thread */
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#ifdef SMP
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/* XXX FIXME: we should be restoring the local APIC TPR */
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#endif
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/*
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* Determine the LDT to use and load it if is the default one and
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* that is not the current one.
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*/
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movl TD_PROC(%ecx),%eax
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cmpl $0,P_MD+MD_LDT(%eax)
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jnz 1f
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movl _default_ldt,%eax
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cmpl PCPU(CURRENTLDT),%eax
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je 2f
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lldt _default_ldt
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movl %eax,PCPU(CURRENTLDT)
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jmp 2f
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1:
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/* Load the LDT when it is not the default one. */
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pushl %edx /* Preserve pointer to pcb. */
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addl $P_MD,%eax /* Pointer to mdproc is arg. */
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pushl %eax
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call set_user_ldt
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addl $4,%esp
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popl %edx
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2:
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/* This must be done after loading the user LDT. */
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.globl cpu_switch_load_gs
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cpu_switch_load_gs:
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movl PCB_GS(%edx),%gs
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/* Test if debug registers should be restored. */
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testl $PCB_DBREGS,PCB_FLAGS(%edx)
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jz 1f
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/*
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* Restore debug registers. The special code for dr7 is to
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* preserve the current values of its reserved bits.
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*/
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movl PCB_DR6(%edx),%eax
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movl %eax,%dr6
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movl PCB_DR3(%edx),%eax
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movl %eax,%dr3
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movl PCB_DR2(%edx),%eax
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movl %eax,%dr2
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movl PCB_DR1(%edx),%eax
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movl %eax,%dr1
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movl PCB_DR0(%edx),%eax
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movl %eax,%dr0
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movl %dr7,%eax
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andl $0x0000fc00,%eax
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movl PCB_DR7(%edx),%ecx
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andl $~0x0000fc00,%ecx
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orl %ecx,%eax
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movl %eax,%dr7
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1:
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ret
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#ifdef INVARIANTS
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badsw3:
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pushal
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pushl $sw0_3
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call panic
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sw0_3: .asciz "cpu_switch: choosethread returned NULL"
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#endif
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/*
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* savectx(pcb)
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* Update pcb, saving current processor state.
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*/
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ENTRY(savectx)
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/* Fetch PCB. */
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movl 4(%esp),%ecx
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/* Save caller's return address. Child won't execute this routine. */
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movl (%esp),%eax
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movl %eax,PCB_EIP(%ecx)
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movl %cr3,%eax
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movl %eax,PCB_CR3(%ecx)
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movl %ebx,PCB_EBX(%ecx)
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movl %esp,PCB_ESP(%ecx)
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movl %ebp,PCB_EBP(%ecx)
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movl %esi,PCB_ESI(%ecx)
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movl %edi,PCB_EDI(%ecx)
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movl %gs,PCB_GS(%ecx)
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pushfl
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popl PCB_PSL(%ecx)
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#ifdef DEV_NPX
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/*
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* If fpcurthread == NULL, then the npx h/w state is irrelevant and the
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* state had better already be in the pcb. This is true for forks
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* but not for dumps (the old book-keeping with FP flags in the pcb
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* always lost for dumps because the dump pcb has 0 flags).
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*
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* If fpcurthread != NULL, then we have to save the npx h/w state to
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* fpcurthread's pcb and copy it to the requested pcb, or save to the
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* requested pcb and reload. Copying is easier because we would
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* have to handle h/w bugs for reloading. We used to lose the
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* parent's npx state for forks by forgetting to reload.
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*/
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pushfl
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cli
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movl PCPU(FPCURTHREAD),%eax
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testl %eax,%eax
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je 1f
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pushl %ecx
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movl TD_PCB(%eax),%eax
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leal PCB_SAVEFPU(%eax),%eax
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pushl %eax
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pushl %eax
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call npxsave
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addl $4,%esp
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popl %eax
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popl %ecx
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pushl $PCB_SAVEFPU_SIZE
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leal PCB_SAVEFPU(%ecx),%ecx
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pushl %ecx
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pushl %eax
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call bcopy
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addl $12,%esp
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1:
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popfl
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#endif /* DEV_NPX */
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ret
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