2202c37926
implement also GPIO_INTR_EDGE_BOTH mode. All reasonable interrupt modes are supported now.
89 lines
2.5 KiB
C
89 lines
2.5 KiB
C
/*-
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* Copyright (c) 2011
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* Ben Gray <ben.r.gray@gmail.com>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef TI_GPIO_H
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#define TI_GPIO_H
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/* The maximum number of banks for any SoC */
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#define MAX_GPIO_BANKS 6
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/*
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* Maximum GPIOS possible, max of *_MAX_GPIO_BANKS * *_INTR_PER_BANK.
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* These are defined in ti_gpio.c
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*/
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#define MAX_GPIO_INTRS 8
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#ifndef INTRNG
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struct ti_gpio_mask_arg {
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void *softc;
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int pin;
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};
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#else
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struct ti_gpio_irqsrc {
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struct intr_irqsrc tgi_isrc;
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u_int tgi_irq;
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uint32_t tgi_mask;
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uint32_t tgi_mode;
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};
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#endif
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/**
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* Structure that stores the driver context.
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*
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* This structure is allocated during driver attach.
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*/
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struct ti_gpio_softc {
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device_t sc_dev;
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device_t sc_busdev;
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#ifndef INTRNG
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/* Interrupt trigger type and level. */
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enum intr_trigger *sc_irq_trigger;
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enum intr_polarity *sc_irq_polarity;
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#endif
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int sc_bank;
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int sc_maxpin;
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struct mtx sc_mtx;
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int sc_mem_rid;
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struct resource *sc_mem_res;
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int sc_irq_rid;
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struct resource *sc_irq_res;
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#ifndef INTRNG
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/* Interrupt events. */
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struct intr_event **sc_events;
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struct ti_gpio_mask_arg *sc_mask_args;
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#else
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struct ti_gpio_irqsrc *sc_isrcs;
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#endif
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/* The handle for the register IRQ handlers. */
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void *sc_irq_hdl;
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};
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#endif /* TI_GPIO_H */
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