969eaf2179
and wd80x3 support. Make the obscure ISA cards optional, and add those options to NOTES on i386 (note: the ifdef around the whole code is for module building). Tweak pc98 ed support to include wd80x3 too. Add goo for alpha too. The affected cards are the 3Com 3C503, HP LAN+ and SIC (whatever that is). I couldn't find any of these for sale on ebay, so they are untested. If you have one of these cards, and send it to me, I'll ensure that you have no future problems with it... Minor cleanups as well by using functions rather than cut and paste code for some probing operations (where the function call overhead is lost in the noise). Remove use of kvtop, since they aren't required anymore. This driver needs to get its memory mapped act together, however, and use bus space. It doesn't right now. This reduces the size of if_ed.ko from about 51k to 33k on my laptop.
664 lines
16 KiB
C
664 lines
16 KiB
C
/*-
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* Copyright (c) 2005, M. Warner Losh
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* All rights reserved.
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* Copyright (c) 1995, David Greenman
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_ed.h"
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#ifdef ED_HPP
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/sockio.h>
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#include <sys/mbuf.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/syslog.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <net/ethernet.h>
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#include <net/if.h>
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#include <net/if_arp.h>
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#include <net/if_dl.h>
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#include <net/if_mib.h>
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#include <net/if_media.h>
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#include <net/bpf.h>
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#include <dev/ed/if_edreg.h>
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#include <dev/ed/if_edvar.h>
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static void ed_hpp_writemem(struct ed_softc *, uint8_t *, uint16_t,
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uint16_t);
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/*
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* Interrupt conversion table for the HP PC LAN+
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*/
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static uint16_t ed_hpp_intr_val[] = {
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0, /* 0 */
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0, /* 1 */
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0, /* 2 */
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3, /* 3 */
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4, /* 4 */
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5, /* 5 */
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6, /* 6 */
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7, /* 7 */
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0, /* 8 */
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9, /* 9 */
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10, /* 10 */
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11, /* 11 */
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12, /* 12 */
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0, /* 13 */
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0, /* 14 */
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15 /* 15 */
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};
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#define ED_HPP_TEST_SIZE 16
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/*
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* Probe and vendor specific initialization for the HP PC Lan+ Cards.
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* (HP Part nos: 27247B and 27252A).
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*
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* The card has an asic wrapper around a DS8390 core. The asic handles
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* host accesses and offers both standard register IO and memory mapped
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* IO. Memory mapped I/O allows better performance at the expense of greater
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* chance of an incompatibility with existing ISA cards.
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*
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* The card has a few caveats: it isn't tolerant of byte wide accesses, only
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* short (16 bit) or word (32 bit) accesses are allowed. Some card revisions
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* don't allow 32 bit accesses; these are indicated by a bit in the software
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* ID register (see if_edreg.h).
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*
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* Other caveats are: we should read the MAC address only when the card
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* is inactive.
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*
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* For more information; please consult the CRYNWR packet driver.
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*
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* The AUI port is turned on using the "link2" option on the ifconfig
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* command line.
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*/
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int
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ed_probe_HP_pclanp(device_t dev, int port_rid, int flags)
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{
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struct ed_softc *sc = device_get_softc(dev);
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int error;
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int n; /* temp var */
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int memsize; /* mem on board */
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u_char checksum; /* checksum of board address */
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u_char irq; /* board configured IRQ */
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uint8_t test_pattern[ED_HPP_TEST_SIZE]; /* read/write areas for */
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uint8_t test_buffer[ED_HPP_TEST_SIZE]; /* probing card */
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u_long conf_maddr, conf_msize, conf_irq, junk;
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error = ed_alloc_port(dev, 0, ED_HPP_IO_PORTS);
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if (error)
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return (error);
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/* Fill in basic information */
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sc->asic_offset = ED_HPP_ASIC_OFFSET;
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sc->nic_offset = ED_HPP_NIC_OFFSET;
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sc->chip_type = ED_CHIP_TYPE_DP8390;
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sc->isa16bit = 0; /* the 8390 core needs to be in byte mode */
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/*
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* Look for the HP PCLAN+ signature: "0x50,0x48,0x00,0x53"
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*/
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if ((ed_asic_inb(sc, ED_HPP_ID) != 0x50) ||
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(ed_asic_inb(sc, ED_HPP_ID + 1) != 0x48) ||
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((ed_asic_inb(sc, ED_HPP_ID + 2) & 0xF0) != 0) ||
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(ed_asic_inb(sc, ED_HPP_ID + 3) != 0x53))
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return ENXIO;
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/*
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* Read the MAC address and verify checksum on the address.
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*/
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ed_asic_outw(sc, ED_HPP_PAGING, ED_HPP_PAGE_MAC);
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for (n = 0, checksum = 0; n < ETHER_ADDR_LEN; n++)
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checksum += (sc->arpcom.ac_enaddr[n] =
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ed_asic_inb(sc, ED_HPP_MAC_ADDR + n));
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checksum += ed_asic_inb(sc, ED_HPP_MAC_ADDR + ETHER_ADDR_LEN);
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if (checksum != 0xFF)
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return ENXIO;
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/*
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* Verify that the software model number is 0.
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*/
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ed_asic_outw(sc, ED_HPP_PAGING, ED_HPP_PAGE_ID);
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if (((sc->hpp_id = ed_asic_inw(sc, ED_HPP_PAGE_4)) &
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ED_HPP_ID_SOFT_MODEL_MASK) != 0x0000)
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return ENXIO;
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/*
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* Read in and save the current options configured on card.
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*/
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sc->hpp_options = ed_asic_inw(sc, ED_HPP_OPTION);
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sc->hpp_options |= (ED_HPP_OPTION_NIC_RESET |
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ED_HPP_OPTION_CHIP_RESET | ED_HPP_OPTION_ENABLE_IRQ);
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/*
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* Reset the chip. This requires writing to the option register
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* so take care to preserve the other bits.
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*/
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ed_asic_outw(sc, ED_HPP_OPTION,
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(sc->hpp_options & ~(ED_HPP_OPTION_NIC_RESET |
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ED_HPP_OPTION_CHIP_RESET)));
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DELAY(5000); /* wait for chip reset to complete */
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ed_asic_outw(sc, ED_HPP_OPTION,
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(sc->hpp_options | (ED_HPP_OPTION_NIC_RESET |
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ED_HPP_OPTION_CHIP_RESET |
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ED_HPP_OPTION_ENABLE_IRQ)));
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DELAY(5000);
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if (!(ed_nic_inb(sc, ED_P0_ISR) & ED_ISR_RST))
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return ENXIO; /* reset did not complete */
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/*
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* Read out configuration information.
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*/
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ed_asic_outw(sc, ED_HPP_PAGING, ED_HPP_PAGE_HW);
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irq = ed_asic_inb(sc, ED_HPP_HW_IRQ);
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/*
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* Check for impossible IRQ.
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*/
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if (irq >= (sizeof(ed_hpp_intr_val) / sizeof(ed_hpp_intr_val[0])))
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return ENXIO;
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/*
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* If the kernel IRQ was specified with a '?' use the cards idea
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* of the IRQ. If the kernel IRQ was explicitly specified, it
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* should match that of the hardware.
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*/
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error = bus_get_resource(dev, SYS_RES_IRQ, 0, &conf_irq, &junk);
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if (error)
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bus_set_resource(dev, SYS_RES_IRQ, 0, ed_hpp_intr_val[irq], 1);
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else {
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if (conf_irq != ed_hpp_intr_val[irq])
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return (ENXIO);
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}
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/*
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* Fill in softconfig info.
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*/
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sc->vendor = ED_VENDOR_HP;
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sc->type = ED_TYPE_HP_PCLANPLUS;
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sc->type_str = "HP-PCLAN+";
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sc->mem_shared = 0; /* we DON'T have dual ported RAM */
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sc->mem_start = 0; /* we use offsets inside the card RAM */
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sc->hpp_mem_start = NULL;/* no memory mapped I/O by default */
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/*
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* The board has 32KB of memory. Is there a way to determine
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* this programmatically?
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*/
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memsize = 32768;
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/*
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* Check if memory mapping of the I/O registers possible.
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*/
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if (sc->hpp_options & ED_HPP_OPTION_MEM_ENABLE) {
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u_long mem_addr;
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/*
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* determine the memory address from the board.
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*/
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ed_asic_outw(sc, ED_HPP_PAGING, ED_HPP_PAGE_HW);
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mem_addr = (ed_asic_inw(sc, ED_HPP_HW_MEM_MAP) << 8);
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/*
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* Check that the kernel specified start of memory and
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* hardware's idea of it match.
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*/
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error = bus_get_resource(dev, SYS_RES_MEMORY, 0,
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&conf_maddr, &conf_msize);
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if (error)
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return (error);
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if (mem_addr != conf_maddr)
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return ENXIO;
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error = ed_alloc_memory(dev, 0, memsize);
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if (error)
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return (error);
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sc->hpp_mem_start = rman_get_virtual(sc->mem_res);
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}
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/*
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* Fill in the rest of the soft config structure.
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*/
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/*
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* The transmit page index.
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*/
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sc->tx_page_start = ED_HPP_TX_PAGE_OFFSET;
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if (device_get_flags(dev) & ED_FLAGS_NO_MULTI_BUFFERING)
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sc->txb_cnt = 1;
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else
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sc->txb_cnt = 2;
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/*
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* Memory description
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*/
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sc->mem_size = memsize;
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sc->mem_ring = sc->mem_start +
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(sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE);
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sc->mem_end = sc->mem_start + sc->mem_size;
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/*
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* Receive area starts after the transmit area and
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* continues till the end of memory.
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*/
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sc->rec_page_start = sc->tx_page_start +
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(sc->txb_cnt * ED_TXBUF_SIZE);
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sc->rec_page_stop = (sc->mem_size / ED_PAGE_SIZE);
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sc->cr_proto = 0; /* value works */
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/*
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* Set the wrap registers for string I/O reads.
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*/
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ed_asic_outw(sc, ED_HPP_PAGING, ED_HPP_PAGE_HW);
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ed_asic_outw(sc, ED_HPP_HW_WRAP,
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((sc->rec_page_start / ED_PAGE_SIZE) |
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(((sc->rec_page_stop / ED_PAGE_SIZE) - 1) << 8)));
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/*
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* Reset the register page to normal operation.
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*/
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ed_asic_outw(sc, ED_HPP_PAGING, ED_HPP_PAGE_PERF);
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/*
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* Verify that we can read/write from adapter memory.
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* Create test pattern.
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*/
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for (n = 0; n < ED_HPP_TEST_SIZE; n++)
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test_pattern[n] = (n*n) ^ ~n;
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#undef ED_HPP_TEST_SIZE
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/*
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* Check that the memory is accessible thru the I/O ports.
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* Write out the contents of "test_pattern", read back
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* into "test_buffer" and compare the two for any
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* mismatch.
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*/
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for (n = 0; n < (32768 / ED_PAGE_SIZE); n ++) {
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ed_hpp_writemem(sc, test_pattern, (n * ED_PAGE_SIZE),
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sizeof(test_pattern));
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ed_hpp_readmem(sc, (n * ED_PAGE_SIZE),
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test_buffer, sizeof(test_pattern));
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if (bcmp(test_pattern, test_buffer,
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sizeof(test_pattern)))
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return ENXIO;
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}
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return (0);
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}
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/*
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* HP PC Lan+ : Set the physical link to use AUI or TP/TL.
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*/
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void
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ed_hpp_set_physical_link(struct ed_softc *sc)
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{
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struct ifnet *ifp = &sc->arpcom.ac_if;
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int lan_page;
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ed_asic_outw(sc, ED_HPP_PAGING, ED_HPP_PAGE_LAN);
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lan_page = ed_asic_inw(sc, ED_HPP_PAGE_0);
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if (ifp->if_flags & IFF_ALTPHYS) {
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/*
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* Use the AUI port.
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*/
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lan_page |= ED_HPP_LAN_AUI;
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ed_asic_outw(sc, ED_HPP_PAGING, ED_HPP_PAGE_LAN);
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ed_asic_outw(sc, ED_HPP_PAGE_0, lan_page);
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} else {
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/*
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* Use the ThinLan interface
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*/
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lan_page &= ~ED_HPP_LAN_AUI;
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ed_asic_outw(sc, ED_HPP_PAGING, ED_HPP_PAGE_LAN);
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ed_asic_outw(sc, ED_HPP_PAGE_0, lan_page);
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}
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/*
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* Wait for the lan card to re-initialize itself
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*/
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DELAY(150000); /* wait 150 ms */
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/*
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* Restore normal pages.
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*/
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ed_asic_outw(sc, ED_HPP_PAGING, ED_HPP_PAGE_PERF);
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}
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|
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/*
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* Support routines to handle the HP PC Lan+ card.
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*/
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/*
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* HP PC Lan+: Read from NIC memory, using either PIO or memory mapped
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* IO.
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*/
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void
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ed_hpp_readmem(struct ed_softc *sc, long src, uint8_t *dst, uint16_t amount)
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{
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int use_32bit_access = !(sc->hpp_id & ED_HPP_ID_16_BIT_ACCESS);
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/* Program the source address in RAM */
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ed_asic_outw(sc, ED_HPP_PAGE_2, src);
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/*
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* The HP PC Lan+ card supports word reads as well as
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* a memory mapped i/o port that is aliased to every
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* even address on the board.
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*/
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if (sc->hpp_mem_start) {
|
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/* Enable memory mapped access. */
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ed_asic_outw(sc, ED_HPP_OPTION, sc->hpp_options &
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~(ED_HPP_OPTION_MEM_DISABLE |
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ED_HPP_OPTION_BOOT_ROM_ENB));
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|
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if (use_32bit_access && (amount > 3)) {
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uint32_t *dl = (uint32_t *) dst;
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volatile uint32_t *const sl =
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(uint32_t *) sc->hpp_mem_start;
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uint32_t *const fence = dl + (amount >> 2);
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|
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/* Copy out NIC data. We could probably write this
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as a `movsl'. The currently generated code is lousy.
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*/
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while (dl < fence)
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*dl++ = *sl;
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|
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dst += (amount & ~3);
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amount &= 3;
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}
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|
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/* Finish off any words left, as a series of short reads */
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if (amount > 1) {
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u_short *d = (u_short *) dst;
|
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volatile u_short *const s =
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(u_short *) sc->hpp_mem_start;
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u_short *const fence = d + (amount >> 1);
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|
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/* Copy out NIC data. */
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while (d < fence)
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*d++ = *s;
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|
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dst += (amount & ~1);
|
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amount &= 1;
|
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}
|
|
|
|
/*
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* read in a byte; however we need to always read 16 bits
|
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* at a time or the hardware gets into a funny state
|
|
*/
|
|
|
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if (amount == 1) {
|
|
/* need to read in a short and copy LSB */
|
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volatile u_short *const s =
|
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(volatile u_short *) sc->hpp_mem_start;
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*dst = (*s) & 0xFF;
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}
|
|
|
|
/* Restore Boot ROM access. */
|
|
ed_asic_outw(sc, ED_HPP_OPTION, sc->hpp_options);
|
|
} else {
|
|
/* Read in data using the I/O port */
|
|
if (use_32bit_access && (amount > 3)) {
|
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ed_asic_insl(sc, ED_HPP_PAGE_4, dst, amount >> 2);
|
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dst += (amount & ~3);
|
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amount &= 3;
|
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}
|
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if (amount > 1) {
|
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ed_asic_insw(sc, ED_HPP_PAGE_4, dst, amount >> 1);
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dst += (amount & ~1);
|
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amount &= 1;
|
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}
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if (amount == 1) { /* read in a short and keep the LSB */
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*dst = ed_asic_inw(sc, ED_HPP_PAGE_4) & 0xFF;
|
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}
|
|
}
|
|
}
|
|
|
|
/*
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|
* HP PC Lan+: Write to NIC memory, using either PIO or memory mapped
|
|
* IO.
|
|
* Only used in the probe routine to test the memory. 'len' must
|
|
* be even.
|
|
*/
|
|
static void
|
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ed_hpp_writemem(struct ed_softc *sc, uint8_t *src, uint16_t dst, uint16_t len)
|
|
{
|
|
/* reset remote DMA complete flag */
|
|
ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
|
|
|
|
/* program the write address in RAM */
|
|
ed_asic_outw(sc, ED_HPP_PAGE_0, dst);
|
|
|
|
if (sc->hpp_mem_start) {
|
|
u_short *s = (u_short *) src;
|
|
volatile u_short *d = (u_short *) sc->hpp_mem_start;
|
|
u_short *const fence = s + (len >> 1);
|
|
|
|
/*
|
|
* Enable memory mapped access.
|
|
*/
|
|
ed_asic_outw(sc, ED_HPP_OPTION, sc->hpp_options &
|
|
~(ED_HPP_OPTION_MEM_DISABLE |
|
|
ED_HPP_OPTION_BOOT_ROM_ENB));
|
|
|
|
/*
|
|
* Copy to NIC memory.
|
|
*/
|
|
while (s < fence)
|
|
*d = *s++;
|
|
|
|
/*
|
|
* Restore Boot ROM access.
|
|
*/
|
|
ed_asic_outw(sc, ED_HPP_OPTION, sc->hpp_options);
|
|
} else {
|
|
/* write data using I/O writes */
|
|
ed_asic_outsw(sc, ED_HPP_PAGE_4, src, len / 2);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Write to HP PC Lan+ NIC memory. Access to the NIC can be by using
|
|
* outsw() or via the memory mapped interface to the same register.
|
|
* Writes have to be in word units; byte accesses won't work and may cause
|
|
* the NIC to behave weirdly. Long word accesses are permitted if the ASIC
|
|
* allows it.
|
|
*/
|
|
|
|
u_short
|
|
ed_hpp_write_mbufs(struct ed_softc *sc, struct mbuf *m, int dst)
|
|
{
|
|
int len, wantbyte;
|
|
unsigned short total_len;
|
|
unsigned char savebyte[2];
|
|
volatile u_short * const d =
|
|
(volatile u_short *) sc->hpp_mem_start;
|
|
int use_32bit_accesses = !(sc->hpp_id & ED_HPP_ID_16_BIT_ACCESS);
|
|
|
|
/* select page 0 registers */
|
|
ed_nic_outb(sc, ED_P0_CR, sc->cr_proto | ED_CR_STA);
|
|
|
|
/* reset remote DMA complete flag */
|
|
ed_nic_outb(sc, ED_P0_ISR, ED_ISR_RDC);
|
|
|
|
/* program the write address in RAM */
|
|
ed_asic_outw(sc, ED_HPP_PAGE_0, dst);
|
|
|
|
if (sc->hpp_mem_start) /* enable memory mapped I/O */
|
|
ed_asic_outw(sc, ED_HPP_OPTION, sc->hpp_options &
|
|
~(ED_HPP_OPTION_MEM_DISABLE |
|
|
ED_HPP_OPTION_BOOT_ROM_ENB));
|
|
|
|
wantbyte = 0;
|
|
total_len = 0;
|
|
|
|
if (sc->hpp_mem_start) { /* Memory mapped I/O port */
|
|
while (m) {
|
|
total_len += (len = m->m_len);
|
|
if (len) {
|
|
caddr_t data = mtod(m, caddr_t);
|
|
/* finish the last word of the previous mbuf */
|
|
if (wantbyte) {
|
|
savebyte[1] = *data;
|
|
*d = *((u_short *) savebyte);
|
|
data++; len--; wantbyte = 0;
|
|
}
|
|
/* output contiguous words */
|
|
if ((len > 3) && (use_32bit_accesses)) {
|
|
volatile uint32_t *const dl =
|
|
(volatile uint32_t *) d;
|
|
uint32_t *sl = (uint32_t *) data;
|
|
uint32_t *fence = sl + (len >> 2);
|
|
|
|
while (sl < fence)
|
|
*dl = *sl++;
|
|
|
|
data += (len & ~3);
|
|
len &= 3;
|
|
}
|
|
/* finish off remain 16 bit writes */
|
|
if (len > 1) {
|
|
u_short *s = (u_short *) data;
|
|
u_short *fence = s + (len >> 1);
|
|
|
|
while (s < fence)
|
|
*d = *s++;
|
|
|
|
data += (len & ~1);
|
|
len &= 1;
|
|
}
|
|
/* save last byte if needed */
|
|
if ((wantbyte = (len == 1)) != 0)
|
|
savebyte[0] = *data;
|
|
}
|
|
m = m->m_next; /* to next mbuf */
|
|
}
|
|
if (wantbyte) /* write last byte */
|
|
*d = *((u_short *) savebyte);
|
|
} else {
|
|
/* use programmed I/O */
|
|
while (m) {
|
|
total_len += (len = m->m_len);
|
|
if (len) {
|
|
caddr_t data = mtod(m, caddr_t);
|
|
/* finish the last word of the previous mbuf */
|
|
if (wantbyte) {
|
|
savebyte[1] = *data;
|
|
ed_asic_outw(sc, ED_HPP_PAGE_4,
|
|
*((u_short *)savebyte));
|
|
data++;
|
|
len--;
|
|
wantbyte = 0;
|
|
}
|
|
/* output contiguous words */
|
|
if ((len > 3) && use_32bit_accesses) {
|
|
ed_asic_outsl(sc, ED_HPP_PAGE_4,
|
|
data, len >> 2);
|
|
data += (len & ~3);
|
|
len &= 3;
|
|
}
|
|
/* finish off remaining 16 bit accesses */
|
|
if (len > 1) {
|
|
ed_asic_outsw(sc, ED_HPP_PAGE_4,
|
|
data, len >> 1);
|
|
data += (len & ~1);
|
|
len &= 1;
|
|
}
|
|
if ((wantbyte = (len == 1)) != 0)
|
|
savebyte[0] = *data;
|
|
|
|
} /* if len != 0 */
|
|
m = m->m_next;
|
|
}
|
|
if (wantbyte) /* spit last byte */
|
|
ed_asic_outw(sc, ED_HPP_PAGE_4, *(u_short *)savebyte);
|
|
|
|
}
|
|
|
|
if (sc->hpp_mem_start) /* turn off memory mapped i/o */
|
|
ed_asic_outw(sc, ED_HPP_OPTION, sc->hpp_options);
|
|
|
|
return (total_len);
|
|
}
|
|
|
|
#endif /* ED_HPP */
|