91dfbef4aa
Applies to MX flash chips on AR9132 and RT3050 Submitted by: Hiroki Mori <yamori813@yahoo.co.jp> Reviewed by: imp, sbruno Differential Revision: https://reviews.freebsd.org/D14279
111 lines
3.5 KiB
C
111 lines
3.5 KiB
C
/*-
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright (c) 2007, Juniper Networks, Inc.
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* Copyright (c) 2012-2013, SRI International
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* All rights reserved.
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*
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* Portions of this software were developed by SRI International and the
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* University of Cambridge Computer Laboratory under DARPA/AFRL contract
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* (FA8750-10-C-0237) ("CTSRD"), as part of the DARPA CRASH research
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* programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _DEV_CFI_VAR_H_
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#define _DEV_CFI_VAR_H_
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enum cfi_wait_cmd {
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CFI_TIMEOUT_ERASE,
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CFI_TIMEOUT_WRITE,
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CFI_TIMEOUT_BUFWRITE
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};
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struct cfi_region {
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u_int r_blocks;
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u_int r_blksz;
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};
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struct cfi_softc {
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device_t sc_dev;
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struct resource *sc_res;
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bus_space_handle_t sc_handle;
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bus_space_tag_t sc_tag;
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int sc_rid;
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u_int sc_size; /* Flash size. */
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u_int sc_width; /* Interface width. */
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u_int sc_regions; /* Erase regions. */
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struct cfi_region *sc_region; /* Array of region info. */
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u_int sc_cmdset;
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sbintime_t sc_typical_timeouts[3];
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sbintime_t sc_max_timeouts[3];
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u_int sc_tto_counts[3];
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u_int sc_mto_counts[3];
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u_int sc_maxbuf;
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struct cdev *sc_nod;
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struct proc *sc_opened; /* Process that has us opened. */
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u_char *sc_wrbuf;
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u_char *sc_wrbufcpy;
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u_int sc_wrbufsz;
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u_int sc_wrofs;
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u_int sc_writing;
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u_int sc_manid;
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u_int sc_devid;
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};
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extern char cfi_driver_name[];
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extern devclass_t cfi_devclass;
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extern devclass_t cfi_diskclass;
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int cfi_probe(device_t);
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int cfi_attach(device_t);
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int cfi_detach(device_t);
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uint32_t cfi_read_raw(struct cfi_softc *, u_int);
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uint32_t cfi_read(struct cfi_softc *, u_int);
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uint8_t cfi_read_qry(struct cfi_softc *, u_int);
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int cfi_write_block(struct cfi_softc *);
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int cfi_block_start(struct cfi_softc *, u_int);
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int cfi_block_finish(struct cfi_softc *);
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#ifdef CFI_SUPPORT_STRATAFLASH
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int cfi_intel_get_factory_pr(struct cfi_softc *sc, uint64_t *);
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int cfi_intel_get_oem_pr(struct cfi_softc *sc, uint64_t *);
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int cfi_intel_set_oem_pr(struct cfi_softc *sc, uint64_t);
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int cfi_intel_get_plr(struct cfi_softc *sc, uint32_t *);
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int cfi_intel_set_plr(struct cfi_softc *sc);
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#endif /* CFI_SUPPORT_STRATAFLASH */
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#endif /* _DEV_CFI_VAR_H_ */
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