168 lines
7.0 KiB
C
168 lines
7.0 KiB
C
/* $FreeBSD$ */
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/*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain all copyright
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* notices, this list of conditions and the following disclaimer.
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* 2. The names of the authors may not be used to endorse or promote products
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* derived from this software withough specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef _CHIPS_WAVELAN_H
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#define _CHIPS_WAVELAN_H
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/* This file contains definitions that are common for all versions of
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* the NCR WaveLAN
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*/
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#define WAVELAN_ADDR_SIZE 6 /* Size of a MAC address */
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#define WAVELAN_MTU 1500 /* Maximum size of Wavelan packet */
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/* Modem Management Controler write commands */
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#define MMC_ENCR_KEY 0x00 /* to 0x07 */
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#define MMC_ENCR_ENABLE 0x08
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#define MMC_DES_IO_INVERT 0x0a
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#define MMC_LOOPT_SEL 0x10
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#define MMC_JABBER_ENABLE 0x11
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#define MMC_FREEZE 0x12
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#define MMC_ANTEN_SEL 0x13
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#define MMC_IFS 0x14
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#define MMC_MOD_DELAY 0x15
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#define MMC_JAM_TIME 0x16
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#define MMC_THR_PRE_SET 0x18
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#define MMC_DECAY_PRM 0x19
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#define MMC_DECAY_UPDAT_PRM 0x1a
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#define MMC_QUALITY_THR 0x1b
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#define MMC_NETW_ID_L 0x1c
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#define MMC_NETW_ID_H 0x1d
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#define MMC_MODE_SEL 0x1e
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#define MMC_EECTRL 0x20 /* 2.4 Gz */
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#define MMC_EEADDR 0x21 /* 2.4 Gz */
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#define MMC_EEDATAL 0x22 /* 2.4 Gz */
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#define MMC_EEDATAH 0x23 /* 2.4 Gz */
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#define MMC_ANALCTRL 0x24 /* 2.4 Gz */
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/* fields in MMC registers that relate to EEPROM in WaveMODEM daughtercard */
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#define MMC_EECTRL_EEPRE 0x10 /* 2.4 Gz EEPROM Protect Reg Enable */
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#define MMC_EECTRL_DWLD 0x08 /* 2.4 Gz EEPROM Download Synths */
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#define MMC_EECTRL_EEOP 0x07 /* 2.4 Gz EEPROM Opcode mask */
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#define MMC_EECTRL_EEOP_READ 0x06 /* 2.4 Gz EEPROM Read Opcode */
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#define MMC_EEADDR_CHAN 0xf0 /* 2.4 Gz EEPROM Channel # mask */
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#define MMC_EEADDR_WDCNT 0x0f /* 2.4 Gz EEPROM DNLD WordCount-1 */
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#define MMC_ANALCTRL_ANTPOL 0x02 /* 2.4 Gz Antenna Polarity mask */
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#define MMC_ANALCTRL_EXTANT 0x01 /* 2.4 Gz External Antenna mask */
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/* MMC read register names */
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#define MMC_DCE_STATUS 0x10
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#define MMC_CORRECT_NWID_L 0x14
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#define MMC_CORRECT_NWID_H 0x15
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#define MMC_WRONG_NWID_L 0x16
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#define MMC_WRONG_NWID_H 0x17
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#define MMC_THR_PRE_SET 0x18
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#define MMC_SIGNAL_LVL 0x19
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#define MMC_SILENCE_LVL 0x1a
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#define MMC_SIGN_QUAL 0x1b
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#define MMC_DES_AVAIL 0x09
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#define MMC_EECTRLstat 0x20 /* 2.4 Gz EEPROM r/w/dwld status */
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#define MMC_EEDATALrv 0x22 /* 2.4 Gz EEPROM read value */
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#define MMC_EEDATAHrv 0x23 /* 2.4 Gz EEPROM read value */
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/* fields in MMC registers that relate to EEPROM in WaveMODEM daughtercard */
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#define MMC_EECTRLstat_ID24 0xf0 /* 2.4 Gz =A0 rev-A, =B0 rev-B */
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#define MMC_EECTRLstat_DWLD 0x08 /* 2.4 Gz Synth/Tx-Pwr DWLD busy */
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#define MMC_EECTRLstat_EEBUSY 0x04 /* 2.4 Gz EEPROM busy */
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/* additional socket ioctl params for wl card
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* see sys/sockio.h for numbers. The 2nd params here
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* must be greater than any values in sockio.h
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*/
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#define SIOCGWLCNWID _IOWR('i', 60, struct ifreq) /* get wlan current nwid */
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#define SIOCSWLCNWID _IOWR('i', 61, struct ifreq) /* set wlan current nwid */
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#define SIOCGWLPSA _IOWR('i', 62, struct ifreq) /* get wlan PSA (all) */
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#define SIOCSWLPSA _IOWR('i', 63, struct ifreq) /* set wlan PSA (all) */
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#define SIOCDWLCACHE _IOW('i', 64, struct ifreq) /* clear SNR cache */
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#define SIOCSWLTHR _IOW('i', 65, struct ifreq) /* set new quality threshold */
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#define SIOCGWLEEPROM _IOWR('i', 66, struct ifreq) /* get modem EEPROM */
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#define SIOCGWLCACHE _IOWR('i', 67, struct ifreq) /* get SNR cache */
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#define SIOCGWLCITEM _IOWR('i', 68, struct ifreq) /* get cache element count */
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/* PSA address definitions */
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#define WLPSA_ID 0x0 /* ID byte (0 for ISA, 0x14 for MCA) */
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#define WLPSA_IO1 0x1 /* I/O address 1 */
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#define WLPSA_IO2 0x2 /* I/O address 2 */
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#define WLPSA_IO3 0x3 /* I/O address 3 */
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#define WLPSA_BR1 0x4 /* Bootrom address 1 */
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#define WLPSA_BR2 0x5 /* Bootrom address 2 */
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#define WLPSA_BR3 0x6 /* Bootrom address 3 */
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#define WLPSA_HWCONF 0x7 /* HW config bits */
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#define WLPSA_IRQNO 0x8 /* IRQ value */
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#define WLPSA_UNIMAC 0x10 /* Universal MAC address */
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#define WLPSA_LOCALMAC 0x16 /* Locally configured MAC address */
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#define WLPSA_MACSEL 0x1c /* MAC selector */
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#define WLPSA_COMPATNO 0x1d /* compatibility number */
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#define WLPSA_THRESH 0x1e /* RF modem threshold preset */
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#define WLPSA_FEATSEL 0x1f /* feature select */
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#define WLPSA_SUBBAND 0x20 /* subband selector */
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#define WLPSA_QUALTHRESH 0x21 /* RF modem quality threshold preset */
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#define WLPSA_HWVERSION 0x22 /* hardware version indicator */
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#define WLPSA_NWID 0x23 /* network ID */
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#define WLPSA_NWIDENABLE 0x24 /* network ID enable */
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#define WLPSA_SECURITY 0x25 /* datalink security enable */
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#define WLPSA_DESKEY 0x26 /* datalink security DES key */
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#define WLPSA_DBWIDTH 0x2f /* databus width select */
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#define WLPSA_CALLCODE 0x30 /* call code (japan only) */
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#define WLPSA_CONFIGURED 0x3c /* configuration status */
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#define WLPSA_CRCLOW 0x3d /* CRC-16 (lowbyte) */
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#define WLPSA_CRCHIGH 0x3e /* (highbyte) */
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#define WLPSA_CRCOK 0x3f /* CRC OK flag */
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#define WLPSA_COMPATNO_WL24B 0x04 /* 2.4 Gz WaveMODEM ISA rev-B */
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/*
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* signal strength cache
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*
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* driver (wlp only at the moment) keeps cache of last
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* IP (only) packets to arrive including signal strength info.
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* daemons may read this with kvm. See if_wlp.c for globals
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* that may be accessed through kvm.
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*
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* Each entry in the w_sigcache has a unique macsrc and age.
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* Each entry is identified by its macsrc field.
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* Age of the packet is identified by its age field.
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*/
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#define MAXCACHEITEMS 10
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#ifndef INT_MAX
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#define INT_MAX 2147483647
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#endif
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#define MAX_AGE (INT_MAX - MAXCACHEITEMS)
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/* signal is 7 bits, 0..63, although it doesn't seem to get to 63.
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* silence is 7 bits, 0..63
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* quality is 4 bits, 0..15
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*/
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struct w_sigcache {
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char macsrc[6]; /* unique MAC address for entry */
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int ipsrc; /* ip address associated with packet */
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int signal; /* signal strength of the packet */
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int silence; /* silence of the packet */
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int quality; /* quality of the packet */
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int snr; /* packet has unique age between 1 to MAX_AGE - 1 */
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};
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#endif /* _CHIPS_WAVELAN_H */
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