2cd8f54b87
biospci_write_config args swapped length and value to write. Some hardware coped just fine, while other hardware had issues. PR: 155441 Submitted by: longwitz at incore dot de
486 lines
10 KiB
C
486 lines
10 KiB
C
/*-
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* Copyright (c) 2004 Hidetoshi Shimokawa <simokawa@FreeBSD.ORG>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* FireWire disk device handling.
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*
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*/
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#include <stand.h>
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#include <machine/bootinfo.h>
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#include <stdarg.h>
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#include <bootstrap.h>
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#include <btxv86.h>
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#include <libi386.h>
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#include <dev/firewire/firewire.h>
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#include "fwohci.h"
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#include <dev/dcons/dcons.h>
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/* XXX */
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#define BIT4x2(x,y) uint8_t y:4, x:4
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#define BIT16x2(x,y) uint32_t y:16, x:16
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#define _KERNEL
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#include <dev/firewire/iec13213.h>
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extern uint32_t dcons_paddr;
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extern struct console dconsole;
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struct crom_src_buf {
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struct crom_src src;
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struct crom_chunk root;
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struct crom_chunk vendor;
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struct crom_chunk hw;
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/* for dcons */
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struct crom_chunk unit;
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struct crom_chunk spec;
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struct crom_chunk ver;
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};
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static int fw_init(void);
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static int fw_strategy(void *devdata, int flag, daddr_t dblk,
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size_t size, char *buf, size_t *rsize);
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static int fw_open(struct open_file *f, ...);
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static int fw_close(struct open_file *f);
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static int fw_print(int verbose);
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static void fw_cleanup(void);
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void fw_enable(void);
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struct devsw fwohci = {
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"FW1394", /* 7 chars at most */
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DEVT_NET,
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fw_init,
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fw_strategy,
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fw_open,
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fw_close,
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noioctl,
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fw_print,
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fw_cleanup
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};
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static struct fwohci_softc fwinfo[MAX_OHCI];
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static int fw_initialized = 0;
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static void
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fw_probe(int index, struct fwohci_softc *sc)
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{
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int err;
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sc->state = FWOHCI_STATE_INIT;
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err = biospci_find_devclass(
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0x0c0010 /* Serial:FireWire:OHCI */,
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index /* index */,
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&sc->locator);
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if (err != 0) {
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sc->state = FWOHCI_STATE_DEAD;
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return;
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}
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biospci_write_config(sc->locator,
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0x4 /* command */,
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BIOSPCI_16BITS,
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0x6 /* enable bus master and memory mapped I/O */);
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biospci_read_config(sc->locator, 0x00 /*devid*/, BIOSPCI_32BITS,
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&sc->devid);
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biospci_read_config(sc->locator, 0x10 /*base_addr*/, BIOSPCI_32BITS,
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&sc->base_addr);
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sc->handle = (uint32_t)PTOV(sc->base_addr);
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sc->bus_id = OREAD(sc, OHCI_BUS_ID);
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return;
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}
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static int
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fw_init(void)
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{
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int i, avail;
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struct fwohci_softc *sc;
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if (fw_initialized)
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return (0);
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avail = 0;
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for (i = 0; i < MAX_OHCI; i ++) {
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sc = &fwinfo[i];
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fw_probe(i, sc);
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if (sc->state == FWOHCI_STATE_DEAD)
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break;
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avail ++;
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break;
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}
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fw_initialized = 1;
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return (0);
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}
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/*
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* Print information about OHCI chips
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*/
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static int
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fw_print(int verbose)
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{
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char line[80];
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int i, ret = 0;
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struct fwohci_softc *sc;
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printf("%s devices:", fwohci.dv_name);
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if ((ret = pager_output("\n")) != 0)
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return (ret);
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for (i = 0; i < MAX_OHCI; i ++) {
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sc = &fwinfo[i];
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if (sc->state == FWOHCI_STATE_DEAD)
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break;
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snprintf(line, sizeof(line), "%d: locator=0x%04x devid=0x%08x"
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" base_addr=0x%08x handle=0x%08x bus_id=0x%08x\n",
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i, sc->locator, sc->devid,
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sc->base_addr, sc->handle, sc->bus_id);
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ret = pager_output(line);
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if (ret != 0)
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break;
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}
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return (ret);
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}
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static int
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fw_open(struct open_file *f, ...)
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{
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#if 0
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va_list ap;
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struct i386_devdesc *dev;
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struct open_disk *od;
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int error;
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va_start(ap, f);
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dev = va_arg(ap, struct i386_devdesc *);
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va_end(ap);
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#endif
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return (ENXIO);
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}
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static int
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fw_close(struct open_file *f)
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{
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return (0);
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}
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static void
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fw_cleanup()
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{
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struct dcons_buf *db;
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/* invalidate dcons buffer */
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if (dcons_paddr) {
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db = (struct dcons_buf *)PTOV(dcons_paddr);
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db->magic = 0;
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}
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}
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static int
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fw_strategy(void *devdata, int rw, daddr_t dblk, size_t size,
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char *buf, size_t *rsize)
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{
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return (EIO);
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}
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static void
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fw_init_crom(struct fwohci_softc *sc)
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{
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struct crom_src *src;
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printf("fw_init_crom\n");
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sc->crom_src_buf = (struct crom_src_buf *)
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malloc(sizeof(struct crom_src_buf));
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if (sc->crom_src_buf == NULL)
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return;
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src = &sc->crom_src_buf->src;
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bzero(src, sizeof(struct crom_src));
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/* BUS info sample */
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src->hdr.info_len = 4;
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src->businfo.bus_name = CSR_BUS_NAME_IEEE1394;
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src->businfo.irmc = 1;
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src->businfo.cmc = 1;
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src->businfo.isc = 1;
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src->businfo.bmc = 1;
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src->businfo.pmc = 0;
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src->businfo.cyc_clk_acc = 100;
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src->businfo.max_rec = sc->maxrec;
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src->businfo.max_rom = MAXROM_4;
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#define FW_GENERATION_CHANGEABLE 2
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src->businfo.generation = FW_GENERATION_CHANGEABLE;
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src->businfo.link_spd = sc->speed;
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src->businfo.eui64.hi = sc->eui.hi;
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src->businfo.eui64.lo = sc->eui.lo;
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STAILQ_INIT(&src->chunk_list);
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sc->crom_src = src;
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sc->crom_root = &sc->crom_src_buf->root;
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}
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static void
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fw_reset_crom(struct fwohci_softc *sc)
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{
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struct crom_src_buf *buf;
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struct crom_src *src;
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struct crom_chunk *root;
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printf("fw_reset\n");
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if (sc->crom_src_buf == NULL)
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fw_init_crom(sc);
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buf = sc->crom_src_buf;
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src = sc->crom_src;
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root = sc->crom_root;
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STAILQ_INIT(&src->chunk_list);
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bzero(root, sizeof(struct crom_chunk));
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crom_add_chunk(src, NULL, root, 0);
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crom_add_entry(root, CSRKEY_NCAP, 0x0083c0); /* XXX */
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/* private company_id */
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crom_add_entry(root, CSRKEY_VENDOR, CSRVAL_VENDOR_PRIVATE);
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#ifdef __DragonFly__
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crom_add_simple_text(src, root, &buf->vendor, "DragonFly Project");
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#else
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crom_add_simple_text(src, root, &buf->vendor, "FreeBSD Project");
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#endif
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}
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#define ADDR_HI(x) (((x) >> 24) & 0xffffff)
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#define ADDR_LO(x) ((x) & 0xffffff)
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static void
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dcons_crom(struct fwohci_softc *sc)
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{
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struct crom_src_buf *buf;
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struct crom_src *src;
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struct crom_chunk *root;
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buf = sc->crom_src_buf;
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src = sc->crom_src;
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root = sc->crom_root;
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bzero(&buf->unit, sizeof(struct crom_chunk));
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crom_add_chunk(src, root, &buf->unit, CROM_UDIR);
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crom_add_entry(&buf->unit, CSRKEY_SPEC, CSRVAL_VENDOR_PRIVATE);
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crom_add_simple_text(src, &buf->unit, &buf->spec, "FreeBSD");
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crom_add_entry(&buf->unit, CSRKEY_VER, DCONS_CSR_VAL_VER);
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crom_add_simple_text(src, &buf->unit, &buf->ver, "dcons");
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crom_add_entry(&buf->unit, DCONS_CSR_KEY_HI, ADDR_HI(dcons_paddr));
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crom_add_entry(&buf->unit, DCONS_CSR_KEY_LO, ADDR_LO(dcons_paddr));
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}
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void
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fw_crom(struct fwohci_softc *sc)
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{
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struct crom_src *src;
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void *newrom;
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fw_reset_crom(sc);
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dcons_crom(sc);
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newrom = malloc(CROMSIZE);
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src = &sc->crom_src_buf->src;
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crom_load(src, (uint32_t *)newrom, CROMSIZE);
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if (bcmp(newrom, sc->config_rom, CROMSIZE) != 0) {
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/* Bump generation and reload. */
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src->businfo.generation++;
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/* Handle generation count wraps. */
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if (src->businfo.generation < 2)
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src->businfo.generation = 2;
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/* Recalculate CRC to account for generation change. */
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crom_load(src, (uint32_t *)newrom, CROMSIZE);
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bcopy(newrom, (void *)sc->config_rom, CROMSIZE);
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}
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free(newrom);
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}
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static int
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fw_busreset(struct fwohci_softc *sc)
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{
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int count;
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if (sc->state < FWOHCI_STATE_ENABLED) {
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printf("fwohci not enabled\n");
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return(CMD_OK);
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}
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fw_crom(sc);
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fwohci_ibr(sc);
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count = 0;
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while (sc->state< FWOHCI_STATE_NORMAL) {
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fwohci_poll(sc);
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count ++;
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if (count > 1000) {
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printf("give up to wait bus initialize\n");
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return (-1);
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}
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}
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printf("poll count = %d\n", count);
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return (0);
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}
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void
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fw_enable(void)
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{
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struct fwohci_softc *sc;
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int i;
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if (fw_initialized == 0)
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fw_init();
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for (i = 0; i < MAX_OHCI; i ++) {
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sc = &fwinfo[i];
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if (sc->state != FWOHCI_STATE_INIT)
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break;
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sc->config_rom = (uint32_t *)
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(((uint32_t)sc->config_rom_buf
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+ (CROMSIZE - 1)) & ~(CROMSIZE - 1));
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#if 0
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printf("configrom: %08p %08p\n",
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sc->config_rom_buf, sc->config_rom);
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#endif
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if (fwohci_init(sc, 0) == 0) {
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sc->state = FWOHCI_STATE_ENABLED;
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fw_busreset(sc);
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} else
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sc->state = FWOHCI_STATE_DEAD;
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}
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}
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void
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fw_poll(void)
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{
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struct fwohci_softc *sc;
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int i;
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if (fw_initialized == 0)
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return;
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for (i = 0; i < MAX_OHCI; i ++) {
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sc = &fwinfo[i];
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if (sc->state < FWOHCI_STATE_ENABLED)
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break;
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fwohci_poll(sc);
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}
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}
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#if 0 /* for debug */
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static int
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fw_busreset_cmd(int argc, char *argv[])
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{
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struct fwohci_softc *sc;
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int i;
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for (i = 0; i < MAX_OHCI; i ++) {
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sc = &fwinfo[i];
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if (sc->state < FWOHCI_STATE_INIT)
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break;
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fw_busreset(sc);
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}
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return(CMD_OK);
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}
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static int
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fw_poll_cmd(int argc, char *argv[])
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{
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fw_poll();
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return(CMD_OK);
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}
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static int
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fw_enable_cmd(int argc, char *argv[])
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{
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fw_print(0);
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fw_enable();
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return(CMD_OK);
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}
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static int
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dcons_enable(int argc, char *argv[])
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{
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dconsole.c_init(0);
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fw_enable();
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dconsole.c_flags |= C_ACTIVEIN | C_ACTIVEOUT;
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return(CMD_OK);
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}
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static int
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dcons_read(int argc, char *argv[])
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{
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char c;
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while (dconsole.c_ready()) {
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c = dconsole.c_in();
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printf("%c", c);
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}
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printf("\r\n");
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return(CMD_OK);
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}
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static int
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dcons_write(int argc, char *argv[])
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{
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int len, i;
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if (argc < 2)
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return(CMD_OK);
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len = strlen(argv[1]);
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for (i = 0; i < len; i ++)
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dconsole.c_out(argv[1][i]);
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dconsole.c_out('\r');
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dconsole.c_out('\n');
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return(CMD_OK);
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}
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COMMAND_SET(firewire, "firewire", "enable firewire", fw_enable_cmd);
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COMMAND_SET(fwbusreset, "fwbusreset", "firewire busreset", fw_busreset_cmd);
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COMMAND_SET(fwpoll, "fwpoll", "firewire poll", fw_poll_cmd);
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COMMAND_SET(dcons, "dcons", "enable dcons", dcons_enable);
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COMMAND_SET(dread, "dread", "read from dcons", dcons_read);
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COMMAND_SET(dwrite, "dwrite", "write to dcons", dcons_write);
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#endif
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