1041 lines
25 KiB
C
1041 lines
25 KiB
C
/*
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* Intel PCIC or compatible Controller driver
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*-------------------------------------------------------------------------
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*
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* Copyright (c) 1995 Andrew McRae. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <pccard/i82365.h>
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#include <pccard/cardinfo.h>
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#include <pccard/slot.h>
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/* Get pnp IDs */
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#include <isa/isavar.h>
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#include <dev/pcic/i82365reg.h>
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#include "card_if.h"
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/*
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* Prototypes for interrupt handler.
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*/
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static driver_intr_t pcicintr;
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static int pcic_ioctl(struct slot *, int, caddr_t);
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static int pcic_power(struct slot *);
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static timeout_t pcic_reset;
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static void pcic_resume(struct slot *);
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static void pcic_disable(struct slot *);
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static timeout_t pcictimeout;
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static struct callout_handle pcictimeout_ch
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= CALLOUT_HANDLE_INITIALIZER(&pcictimeout_ch);
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static int pcic_memory(struct slot *, int);
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static int pcic_io(struct slot *, int);
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/*
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* Per-slot data table.
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*/
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static struct pcic_slot {
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int slotnum; /* My slot number */
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int index; /* Index register */
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int data; /* Data register */
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int offset; /* Offset value for index */
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char controller; /* Device type */
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char revision; /* Device Revision */
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struct slot *slt; /* Back ptr to slot */
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u_char (*getb)(struct pcic_slot *, int);
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void (*putb)(struct pcic_slot *, int, u_char);
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u_char *regs; /* Pointer to regs in mem */
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} pcic_slots[PCIC_MAX_SLOTS];
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static struct slot_ctrl cinfo;
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static struct isa_pnp_id pcic_ids[] = {
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{PCIC_PNP_ACTIONTEC, NULL}, /* AEI0218 */
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{PCIC_PNP_IBM3765, NULL}, /* IBM3765 */
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{PCIC_PNP_82365, NULL}, /* PNP0E00 */
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{PCIC_PNP_CL_PD6720, NULL}, /* PNP0E01 */
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{PCIC_PNP_VLSI_82C146, NULL}, /* PNP0E02 */
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{PCIC_PNP_82365_CARDBUS, NULL}, /* PNP0E03 */
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{PCIC_PNP_SCM_SWAPBOX, NULL}, /* SCM0469 */
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{0}
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};
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static int validunits = 0;
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#define GET_UNIT(d) *(int *)device_get_softc(d)
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#define SET_UNIT(d,u) *(int *)device_get_softc(d) = (u)
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static char *bridges[] =
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{
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"Intel i82365",
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"IBM PCIC",
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"VLSI 82C146",
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"Cirrus logic 672x",
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"Cirrus logic 6710",
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"Vadem 365",
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"Vadem 465",
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"Vadem 468",
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"Vadem 469",
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"Ricoh RF5C396",
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"IBM KING PCMCIA Controller"
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};
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/*
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* Internal inline functions for accessing the PCIC.
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*/
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/*
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* Read a register from the PCIC.
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*/
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static __inline unsigned char
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getb1(struct pcic_slot *sp, int reg)
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{
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outb(sp->index, sp->offset + reg);
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return inb(sp->data);
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}
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/*
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* Write a register on the PCIC
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*/
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static __inline void
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putb1(struct pcic_slot *sp, int reg, unsigned char val)
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{
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outb(sp->index, sp->offset + reg);
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outb(sp->data, val);
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}
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/*
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* Clear bit(s) of a register.
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*/
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static __inline void
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clrb(struct pcic_slot *sp, int reg, unsigned char mask)
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{
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sp->putb(sp, reg, sp->getb(sp, reg) & ~mask);
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}
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/*
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* Set bit(s) of a register
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*/
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static __inline void
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setb(struct pcic_slot *sp, int reg, unsigned char mask)
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{
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sp->putb(sp, reg, sp->getb(sp, reg) | mask);
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}
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/*
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* Write a 16 bit value to 2 adjacent PCIC registers
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*/
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static __inline void
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putw(struct pcic_slot *sp, int reg, unsigned short word)
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{
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sp->putb(sp, reg, word & 0xFF);
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sp->putb(sp, reg + 1, (word >> 8) & 0xff);
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}
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/*
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* entry point from main code to map/unmap memory context.
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*/
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static int
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pcic_memory(struct slot *slt, int win)
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{
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struct pcic_slot *sp = slt->cdata;
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struct mem_desc *mp = &slt->mem[win];
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int reg = win * PCIC_MEMSIZE + PCIC_MEMBASE;
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if (mp->flags & MDF_ACTIVE) {
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unsigned long sys_addr = (uintptr_t)(void *)mp->start >> 12;
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/*
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* Write the addresses, card offsets and length.
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* The values are all stored as the upper 12 bits of the
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* 24 bit address i.e everything is allocated as 4 Kb chunks.
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*/
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putw(sp, reg, sys_addr & 0xFFF);
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putw(sp, reg+2, (sys_addr + (mp->size >> 12) - 1) & 0xFFF);
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putw(sp, reg+4, ((mp->card >> 12) - sys_addr) & 0x3FFF);
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/*
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* Each 16 bit register has some flags in the upper bits.
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*/
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if (mp->flags & MDF_16BITS)
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setb(sp, reg+1, PCIC_DATA16);
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if (mp->flags & MDF_ZEROWS)
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setb(sp, reg+1, PCIC_ZEROWS);
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if (mp->flags & MDF_WS0)
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setb(sp, reg+3, PCIC_MW0);
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if (mp->flags & MDF_WS1)
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setb(sp, reg+3, PCIC_MW1);
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if (mp->flags & MDF_ATTR)
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setb(sp, reg+5, PCIC_REG);
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if (mp->flags & MDF_WP)
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setb(sp, reg+5, PCIC_WP);
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/*
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* Enable the memory window. By experiment, we need a delay.
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*/
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setb(sp, PCIC_ADDRWINE, (1<<win) | PCIC_MEMCS16);
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DELAY(50);
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} else {
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clrb(sp, PCIC_ADDRWINE, 1<<win);
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putw(sp, reg, 0);
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putw(sp, reg+2, 0);
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putw(sp, reg+4, 0);
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}
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return(0);
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}
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/*
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* pcic_io - map or unmap I/O context
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*/
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static int
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pcic_io(struct slot *slt, int win)
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{
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int mask, reg;
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struct pcic_slot *sp = slt->cdata;
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struct io_desc *ip = &slt->io[win];
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if (bootverbose) {
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printf("pcic: I/O win %d flags %x %x-%x\n", win, ip->flags,
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ip->start, ip->start+ip->size-1);
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}
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switch (win) {
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case 0:
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mask = PCIC_IO0_EN;
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reg = PCIC_IO0;
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break;
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case 1:
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mask = PCIC_IO1_EN;
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reg = PCIC_IO1;
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break;
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default:
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panic("Illegal PCIC I/O window request!");
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}
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if (ip->flags & IODF_ACTIVE) {
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unsigned char x, ioctlv;
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putw(sp, reg, ip->start);
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putw(sp, reg+2, ip->start+ip->size-1);
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x = 0;
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if (ip->flags & IODF_ZEROWS)
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x |= PCIC_IO_0WS;
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if (ip->flags & IODF_WS)
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x |= PCIC_IO_WS;
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if (ip->flags & IODF_CS16)
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x |= PCIC_IO_CS16;
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if (ip->flags & IODF_16BIT)
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x |= PCIC_IO_16BIT;
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/*
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* Extract the current flags and merge with new flags.
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* Flags for window 0 in lower nybble, and in upper nybble
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* for window 1.
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*/
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ioctlv = sp->getb(sp, PCIC_IOCTL);
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DELAY(100);
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switch (win) {
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case 0:
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sp->putb(sp, PCIC_IOCTL, x | (ioctlv & 0xf0));
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break;
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case 1:
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sp->putb(sp, PCIC_IOCTL, (x << 4) | (ioctlv & 0xf));
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break;
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}
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DELAY(100);
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setb(sp, PCIC_ADDRWINE, mask);
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DELAY(100);
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} else {
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clrb(sp, PCIC_ADDRWINE, mask);
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DELAY(100);
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putw(sp, reg, 0);
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putw(sp, reg + 2, 0);
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}
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return(0);
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}
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/*
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* Look for an Intel PCIC (or compatible).
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* For each available slot, allocate a PC-CARD slot.
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*/
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/*
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* VLSI 82C146 has incompatibilities about the I/O address of slot 1.
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* Assume it's the only PCIC whose vendor ID is 0x84,
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* contact Warner Losh <imp@freebsd.org> if correct.
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*/
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static int
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pcic_probe(device_t dev)
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{
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int slotnum, validslots = 0;
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struct slot *slt;
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struct pcic_slot *sp;
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unsigned char c;
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int error;
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struct resource *r;
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int rid;
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static int maybe_vlsi = 0;
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/* Check isapnp ids */
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error = ISA_PNP_PROBE(device_get_parent(dev), dev, pcic_ids);
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if (error == ENXIO)
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return (ENXIO);
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/*
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* Initialise controller information structure.
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*/
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cinfo.mapmem = pcic_memory;
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cinfo.mapio = pcic_io;
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cinfo.ioctl = pcic_ioctl;
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cinfo.power = pcic_power;
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cinfo.reset = pcic_reset;
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cinfo.disable = pcic_disable;
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cinfo.resume = pcic_resume;
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cinfo.maxmem = PCIC_MEM_WIN;
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cinfo.maxio = PCIC_IO_WIN;
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if (bus_get_resource_start(dev, SYS_RES_IOPORT, 0) == 0)
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bus_set_resource(dev, SYS_RES_IOPORT, 0, PCIC_INDEX0, 2);
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rid = 0;
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r = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1, RF_ACTIVE);
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if (!r) {
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if (bootverbose)
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device_printf(dev, "Cannot get I/O range\n");
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return ENOMEM;
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}
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sp = &pcic_slots[validunits * PCIC_CARD_SLOTS];
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for (slotnum = 0; slotnum < PCIC_CARD_SLOTS; slotnum++, sp++) {
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/*
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* Initialise the PCIC slot table.
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*/
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sp->getb = getb1;
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sp->putb = putb1;
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sp->index = rman_get_start(r);
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sp->data = sp->index + 1;
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sp->offset = slotnum * PCIC_SLOT_SIZE;
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/*
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* XXX - Screwed up slot 1 on the VLSI chips. According to
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* the Linux PCMCIA code from David Hinds, working chipsets
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* return 0x84 from their (correct) ID ports, while the broken
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* ones would need to be probed at the new offset we set after
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* we assume it's broken.
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*/
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if (slotnum == 1 && maybe_vlsi &&
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sp->getb(sp, PCIC_ID_REV) != PCIC_VLSI82C146) {
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sp->index += 4;
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sp->data += 4;
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sp->offset = PCIC_SLOT_SIZE << 1;
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}
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/*
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* see if there's a PCMCIA controller here
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* Intel PCMCIA controllers use 0x82 and 0x83
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* IBM clone chips use 0x88 and 0x89, apparently
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*/
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c = sp->getb(sp, PCIC_ID_REV);
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sp->revision = -1;
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switch(c) {
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/*
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* 82365 or clones.
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*/
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case PCIC_INTEL0:
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case PCIC_INTEL1:
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sp->controller = PCIC_I82365;
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sp->revision = c & 1;
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/*
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* Now check for VADEM chips.
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*/
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outb(sp->index, 0x0E); /* Unlock VADEM's extra regs */
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outb(sp->index, 0x37);
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setb(sp, PCIC_VMISC, PCIC_VADEMREV);
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c = sp->getb(sp, PCIC_ID_REV);
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if (c & 0x08) {
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switch (sp->revision = c & 7) {
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case 1:
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sp->controller = PCIC_VG365;
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break;
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case 2:
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sp->controller = PCIC_VG465;
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break;
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case 3:
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sp->controller = PCIC_VG468;
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break;
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default:
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sp->controller = PCIC_VG469;
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break;
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}
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clrb(sp, PCIC_VMISC, PCIC_VADEMREV);
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}
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/*
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* Check for RICOH RF5C396 PCMCIA Controller
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*/
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c = sp->getb(sp, 0x3a);
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if (c == 0xb2) {
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sp->controller = PCIC_RF5C396;
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}
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break;
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/*
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* VLSI chips.
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*/
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case PCIC_VLSI82C146:
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sp->controller = PCIC_VLSI;
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maybe_vlsi = 1;
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break;
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case PCIC_IBM1:
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case PCIC_IBM2:
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sp->controller = PCIC_IBM;
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sp->revision = c & 1;
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break;
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case PCIC_IBM3:
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sp->controller = PCIC_IBM_KING;
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sp->revision = c & 1;
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break;
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default:
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continue;
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}
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/*
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* Check for Cirrus logic chips.
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*/
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sp->putb(sp, PCIC_CLCHIP, 0);
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c = sp->getb(sp, PCIC_CLCHIP);
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if ((c & PCIC_CLC_TOGGLE) == PCIC_CLC_TOGGLE) {
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c = sp->getb(sp, PCIC_CLCHIP);
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if ((c & PCIC_CLC_TOGGLE) == 0) {
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if (c & PCIC_CLC_DUAL)
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sp->controller = PCIC_PD672X;
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else
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sp->controller = PCIC_PD6710;
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sp->revision = 8 - ((c & 0x1F) >> 2);
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}
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}
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device_set_desc(dev, bridges[(int) sp->controller]);
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/*
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* OK it seems we have a PCIC or lookalike.
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* Allocate a slot and initialise the data structures.
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*/
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validslots++;
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sp->slotnum = slotnum + validunits * PCIC_CARD_SLOTS;
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slt = pccard_alloc_slot(&cinfo);
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if (slt == 0)
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continue;
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slt->cdata = sp;
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sp->slt = slt;
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/*
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* Modem cards send the speaker audio (dialing noises)
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* to the host's speaker. Cirrus Logic PCIC chips must
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* enable this. There is also a Low Power Dynamic Mode bit
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* that claims to reduce power consumption by 30%, so
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* enable it and hope for the best.
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*/
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if (sp->controller == PCIC_PD672X) {
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setb(sp, PCIC_MISC1, PCIC_MISC1_SPEAKER);
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setb(sp, PCIC_MISC2, PCIC_LPDM_EN);
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}
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}
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bus_release_resource(dev, SYS_RES_IOPORT, rid, r);
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return(validslots ? 0 : ENXIO);
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}
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static void
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do_mgt_irq(struct pcic_slot *sp, int irq)
|
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{
|
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/* Management IRQ changes */
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clrb(sp, PCIC_INT_GEN, PCIC_INTR_ENA);
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sp->putb(sp, PCIC_STAT_INT, (irq << 4) | 0xF);
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}
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|
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static int
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pcic_attach(device_t dev)
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{
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void *ih;
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int rid;
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struct resource *r;
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int irq;
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int error;
|
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struct pcic_slot *sp;
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int i;
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int stat;
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|
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SET_UNIT(dev, validunits);
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sp = &pcic_slots[GET_UNIT(dev) * PCIC_CARD_SLOTS];
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for (i = 0; i < PCIC_CARD_SLOTS; i++, sp++) {
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if (sp->slt)
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device_add_child(dev, NULL, -1);
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}
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validunits++;
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rid = 0;
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r = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1, RF_ACTIVE);
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if (!r) {
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return ENXIO;
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}
|
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|
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irq = bus_get_resource_start(dev, SYS_RES_IRQ, 0);
|
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if (irq == 0) {
|
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/* See if the user has requested a specific IRQ */
|
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if (!getenv_int("machdep.pccard.pcic_irq", &irq))
|
|
irq = 0;
|
|
}
|
|
rid = 0;
|
|
r = 0;
|
|
if (irq > 0) {
|
|
r = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, irq,
|
|
irq, 1, RF_ACTIVE);
|
|
}
|
|
if (r && ((1 << (rman_get_start(r))) & PCIC_INT_MASK_ALLOWED) == 0) {
|
|
device_printf(dev,
|
|
"Hardware does not support irq %d, trying polling.\n",
|
|
irq);
|
|
bus_release_resource(dev, SYS_RES_IRQ, rid, r);
|
|
r = 0;
|
|
irq = 0;
|
|
}
|
|
if (r) {
|
|
error = bus_setup_intr(dev, r, INTR_TYPE_MISC,
|
|
pcicintr, (void *) GET_UNIT(dev), &ih);
|
|
if (error) {
|
|
bus_release_resource(dev, SYS_RES_IRQ, rid, r);
|
|
return error;
|
|
}
|
|
irq = rman_get_start(r);
|
|
device_printf(dev, "management irq %d\n", irq);
|
|
} else {
|
|
irq = 0;
|
|
}
|
|
if (irq == 0) {
|
|
pcictimeout_ch = timeout(pcictimeout, (void *) GET_UNIT(dev),
|
|
hz/2);
|
|
device_printf(dev, "Polling mode\n");
|
|
}
|
|
|
|
sp = &pcic_slots[GET_UNIT(dev) * PCIC_CARD_SLOTS];
|
|
for (i = 0; i < PCIC_CARD_SLOTS; i++, sp++) {
|
|
if (sp->slt == NULL)
|
|
continue;
|
|
|
|
do_mgt_irq(sp, irq);
|
|
|
|
/* Check for changes */
|
|
setb(sp, PCIC_POWER, PCIC_PCPWRE| PCIC_DISRST);
|
|
stat = sp->getb(sp, PCIC_STATUS);
|
|
if (bootverbose)
|
|
printf("stat is %x\n", stat);
|
|
if ((stat & PCIC_CD) != PCIC_CD) {
|
|
sp->slt->laststate = sp->slt->state = empty;
|
|
} else {
|
|
sp->slt->laststate = sp->slt->state = filled;
|
|
pccard_event(sp->slt, card_inserted);
|
|
}
|
|
sp->slt->irq = irq;
|
|
}
|
|
|
|
return (bus_generic_attach(dev));
|
|
}
|
|
|
|
/*
|
|
* ioctl calls - Controller specific ioctls
|
|
*/
|
|
static int
|
|
pcic_ioctl(struct slot *slt, int cmd, caddr_t data)
|
|
{
|
|
struct pcic_slot *sp = slt->cdata;
|
|
|
|
switch(cmd) {
|
|
default:
|
|
return(ENOTTY);
|
|
/*
|
|
* Get/set PCIC registers
|
|
*/
|
|
case PIOCGREG:
|
|
((struct pcic_reg *)data)->value =
|
|
sp->getb(sp, ((struct pcic_reg *)data)->reg);
|
|
break;
|
|
case PIOCSREG:
|
|
sp->putb(sp, ((struct pcic_reg *)data)->reg,
|
|
((struct pcic_reg *)data)->value);
|
|
break;
|
|
}
|
|
return(0);
|
|
}
|
|
|
|
/*
|
|
* pcic_power - Enable the power of the slot according to
|
|
* the parameters in the power structure(s).
|
|
*/
|
|
static int
|
|
pcic_power(struct slot *slt)
|
|
{
|
|
unsigned char reg = PCIC_DISRST|PCIC_PCPWRE;
|
|
struct pcic_slot *sp = slt->cdata;
|
|
|
|
switch(sp->controller) {
|
|
case PCIC_PD672X:
|
|
case PCIC_PD6710:
|
|
case PCIC_VG365:
|
|
case PCIC_VG465:
|
|
case PCIC_VG468:
|
|
case PCIC_VG469:
|
|
case PCIC_RF5C396:
|
|
case PCIC_VLSI:
|
|
case PCIC_IBM_KING:
|
|
case PCIC_I82365:
|
|
switch(slt->pwr.vpp) {
|
|
default:
|
|
return(EINVAL);
|
|
case 0:
|
|
break;
|
|
case 50:
|
|
case 33:
|
|
reg |= PCIC_VPP_5V;
|
|
break;
|
|
case 120:
|
|
reg |= PCIC_VPP_12V;
|
|
break;
|
|
}
|
|
switch(slt->pwr.vcc) {
|
|
default:
|
|
return(EINVAL);
|
|
case 0:
|
|
break;
|
|
case 33:
|
|
if (sp->controller == PCIC_IBM_KING) {
|
|
reg |= PCIC_VCC_5V_KING;
|
|
break;
|
|
}
|
|
reg |= PCIC_VCC_3V;
|
|
if ((sp->controller == PCIC_VG468) ||
|
|
(sp->controller == PCIC_VG469) ||
|
|
(sp->controller == PCIC_VG465) ||
|
|
(sp->controller == PCIC_VG365))
|
|
setb(sp, PCIC_CVSR, PCIC_CVSR_VS);
|
|
else
|
|
setb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33);
|
|
break;
|
|
case 50:
|
|
if (sp->controller == PCIC_IBM_KING) {
|
|
reg |= PCIC_VCC_5V_KING;
|
|
break;
|
|
}
|
|
reg |= PCIC_VCC_5V;
|
|
if ((sp->controller == PCIC_VG468) ||
|
|
(sp->controller == PCIC_VG469) ||
|
|
(sp->controller == PCIC_VG465) ||
|
|
(sp->controller == PCIC_VG365))
|
|
clrb(sp, PCIC_CVSR, PCIC_CVSR_VS);
|
|
else
|
|
clrb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33);
|
|
break;
|
|
}
|
|
break;
|
|
}
|
|
sp->putb(sp, PCIC_POWER, reg);
|
|
DELAY(300*1000);
|
|
if (slt->pwr.vcc) {
|
|
reg |= PCIC_OUTENA;
|
|
sp->putb(sp, PCIC_POWER, reg);
|
|
DELAY(100*1000);
|
|
}
|
|
/* Some chips are smarter than us it seems, so if we weren't
|
|
* allowed to use 5V, try 3.3 instead
|
|
*/
|
|
if (!(sp->getb(sp, PCIC_STATUS) & PCIC_POW) && slt->pwr.vcc == 50) {
|
|
slt->pwr.vcc = 33;
|
|
slt->pwr.vpp = 0;
|
|
return (pcic_power(slt));
|
|
}
|
|
return(0);
|
|
}
|
|
|
|
/*
|
|
* tell the PCIC which irq we want to use. only the following are legal:
|
|
* 3, 4, 5, 7, 9, 10, 11, 12, 14, 15. We require the callers of this
|
|
* routine to do the check for legality.
|
|
*/
|
|
static void
|
|
pcic_mapirq(struct slot *slt, int irq)
|
|
{
|
|
struct pcic_slot *sp = slt->cdata;
|
|
if (irq == 0)
|
|
clrb(sp, PCIC_INT_GEN, 0xF);
|
|
else
|
|
sp->putb(sp, PCIC_INT_GEN,
|
|
(sp->getb(sp, PCIC_INT_GEN) & 0xF0) | irq);
|
|
}
|
|
|
|
/*
|
|
* pcic_reset - Reset the card and enable initial power.
|
|
*/
|
|
static void
|
|
pcic_reset(void *chan)
|
|
{
|
|
struct slot *slt = chan;
|
|
struct pcic_slot *sp = slt->cdata;
|
|
|
|
switch (slt->insert_seq) {
|
|
case 0: /* Something funny happended on the way to the pub... */
|
|
return;
|
|
case 1: /* Assert reset */
|
|
clrb(sp, PCIC_INT_GEN, PCIC_CARDRESET);
|
|
slt->insert_seq = 2;
|
|
timeout(pcic_reset, (void *)slt, hz/4);
|
|
return;
|
|
case 2: /* Deassert it again */
|
|
setb(sp, PCIC_INT_GEN, PCIC_CARDRESET|PCIC_IOCARD);
|
|
slt->insert_seq = 3;
|
|
timeout(pcic_reset, (void *)slt, hz/4);
|
|
return;
|
|
case 3: /* Wait if card needs more time */
|
|
if (!sp->getb(sp, PCIC_STATUS) & PCIC_READY) {
|
|
timeout(pcic_reset, (void *)slt, hz/10);
|
|
return;
|
|
}
|
|
}
|
|
slt->insert_seq = 0;
|
|
if (sp->controller == PCIC_PD672X || sp->controller == PCIC_PD6710) {
|
|
sp->putb(sp, PCIC_TIME_SETUP0, 0x1);
|
|
sp->putb(sp, PCIC_TIME_CMD0, 0x6);
|
|
sp->putb(sp, PCIC_TIME_RECOV0, 0x0);
|
|
sp->putb(sp, PCIC_TIME_SETUP1, 1);
|
|
sp->putb(sp, PCIC_TIME_CMD1, 0xf);
|
|
sp->putb(sp, PCIC_TIME_RECOV1, 0);
|
|
}
|
|
selwakeup(&slt->selp);
|
|
}
|
|
|
|
/*
|
|
* pcic_disable - Disable the slot.
|
|
*/
|
|
static void
|
|
pcic_disable(struct slot *slt)
|
|
{
|
|
struct pcic_slot *sp = slt->cdata;
|
|
|
|
sp->putb(sp, PCIC_INT_GEN, 0);
|
|
sp->putb(sp, PCIC_POWER, 0);
|
|
}
|
|
|
|
/*
|
|
* PCIC timer. If the controller doesn't have a free IRQ to use
|
|
* or if interrupt steering doesn't work, poll the controller for
|
|
* insertion/removal events.
|
|
*/
|
|
static void
|
|
pcictimeout(void *chan)
|
|
{
|
|
pcicintr(chan);
|
|
pcictimeout_ch = timeout(pcictimeout, chan, hz/2);
|
|
}
|
|
|
|
/*
|
|
* PCIC Interrupt handler.
|
|
* Check each slot in turn, and read the card status change
|
|
* register. If this is non-zero, then a change has occurred
|
|
* on this card, so send an event to the main code.
|
|
*/
|
|
static void
|
|
pcicintr(void *arg)
|
|
{
|
|
int slot, s;
|
|
unsigned char chg;
|
|
int unit = (int) arg;
|
|
struct pcic_slot *sp = &pcic_slots[unit * PCIC_CARD_SLOTS];
|
|
|
|
s = splhigh();
|
|
for (slot = 0; slot < PCIC_CARD_SLOTS; slot++, sp++) {
|
|
if (sp->slt && (chg = sp->getb(sp, PCIC_STAT_CHG)) != 0) {
|
|
if (bootverbose)
|
|
printf("Slot %d chg = 0x%x\n", slot, chg);
|
|
if (chg & PCIC_CDTCH) {
|
|
if ((sp->getb(sp, PCIC_STATUS) & PCIC_CD) ==
|
|
PCIC_CD) {
|
|
pccard_event(sp->slt, card_inserted);
|
|
} else {
|
|
pcic_disable(sp->slt);
|
|
pccard_event(sp->slt, card_removed);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
splx(s);
|
|
}
|
|
|
|
/*
|
|
* pcic_resume - Suspend/resume support for PCIC
|
|
*/
|
|
static void
|
|
pcic_resume(struct slot *slt)
|
|
{
|
|
struct pcic_slot *sp = slt->cdata;
|
|
|
|
do_mgt_irq(sp, slt->irq);
|
|
if (sp->controller == PCIC_PD672X) {
|
|
setb(sp, PCIC_MISC1, PCIC_MISC1_SPEAKER);
|
|
setb(sp, PCIC_MISC2, PCIC_LPDM_EN);
|
|
}
|
|
}
|
|
|
|
static int
|
|
pcic_activate_resource(device_t dev, device_t child, int type, int rid,
|
|
struct resource *r)
|
|
{
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
int err;
|
|
|
|
switch (type) {
|
|
case SYS_RES_IOPORT: {
|
|
struct io_desc *ip;
|
|
ip = &devi->slt->io[rid];
|
|
if (ip->flags == 0) {
|
|
if (rid == 0)
|
|
ip->flags = IODF_WS | IODF_16BIT | IODF_CS16;
|
|
else
|
|
ip->flags = devi->slt->io[0].flags;
|
|
}
|
|
ip->flags |= IODF_ACTIVE;
|
|
ip->start = rman_get_start(r);
|
|
ip->size = rman_get_end(r) - rman_get_start(r) + 1;
|
|
err = pcic_io(devi->slt, rid);
|
|
if (err)
|
|
return err;
|
|
break;
|
|
}
|
|
case SYS_RES_IRQ:
|
|
/*
|
|
* We actually defer the activation of the IRQ resource
|
|
* until the interrupt is registered to avoid stray
|
|
* interrupt messages.
|
|
*/
|
|
break;
|
|
case SYS_RES_MEMORY: {
|
|
struct mem_desc *mp;
|
|
if (rid >= NUM_MEM_WINDOWS)
|
|
return EINVAL;
|
|
mp = &devi->slt->mem[rid];
|
|
mp->flags |= MDF_ACTIVE;
|
|
mp->start = (caddr_t) rman_get_start(r);
|
|
mp->size = rman_get_end(r) - rman_get_start(r) + 1;
|
|
err = pcic_memory(devi->slt, rid);
|
|
if (err)
|
|
return err;
|
|
break;
|
|
}
|
|
default:
|
|
break;
|
|
}
|
|
err = bus_generic_activate_resource(dev, child, type, rid, r);
|
|
return err;
|
|
}
|
|
|
|
static int
|
|
pcic_deactivate_resource(device_t dev, device_t child, int type, int rid,
|
|
struct resource *r)
|
|
{
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
int err;
|
|
|
|
switch (type) {
|
|
case SYS_RES_IOPORT: {
|
|
struct io_desc *ip = &devi->slt->io[rid];
|
|
ip->flags &= ~IODF_ACTIVE;
|
|
err = pcic_io(devi->slt, rid);
|
|
if (err) {
|
|
return err;
|
|
}
|
|
break;
|
|
}
|
|
case SYS_RES_IRQ:
|
|
break;
|
|
case SYS_RES_MEMORY: {
|
|
struct mem_desc *mp = &devi->slt->mem[rid];
|
|
mp->flags &= ~(MDF_ACTIVE | MDF_ATTR);
|
|
err = pcic_memory(devi->slt, rid);
|
|
if (err) {
|
|
return err;
|
|
}
|
|
break;
|
|
}
|
|
default:
|
|
break;
|
|
}
|
|
err = bus_generic_deactivate_resource(dev, child, type, rid, r);
|
|
return err;
|
|
}
|
|
|
|
static int
|
|
pcic_setup_intr(device_t dev, device_t child, struct resource *irq,
|
|
int flags, driver_intr_t *intr, void *arg, void **cookiep)
|
|
{
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
int err;
|
|
|
|
if (((1 << rman_get_start(irq)) & PCIC_INT_MASK_ALLOWED) == 0) {
|
|
device_printf(dev, "Hardware does not support irq %ld.\n",
|
|
rman_get_start(irq));
|
|
return (EINVAL);
|
|
}
|
|
|
|
err = bus_generic_setup_intr(dev, child, irq, flags, intr, arg,
|
|
cookiep);
|
|
if (err == 0)
|
|
pcic_mapirq(devi->slt, rman_get_start(irq));
|
|
else
|
|
device_printf(dev, "Error %d irq %ld\n", err,
|
|
rman_get_start(irq));
|
|
return (err);
|
|
}
|
|
|
|
static int
|
|
pcic_teardown_intr(device_t dev, device_t child, struct resource *irq,
|
|
void *cookie)
|
|
{
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
|
|
pcic_mapirq(devi->slt, 0);
|
|
return (bus_generic_teardown_intr(dev, child, irq, cookie));
|
|
}
|
|
|
|
static int
|
|
pcic_set_res_flags(device_t bus, device_t child, int restype, int rid,
|
|
u_long value)
|
|
{
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
int err = 0;
|
|
|
|
switch (restype) {
|
|
case SYS_RES_MEMORY: {
|
|
struct mem_desc *mp = &devi->slt->mem[rid];
|
|
switch (value) {
|
|
case 0:
|
|
mp->flags &= ~MDF_ATTR;
|
|
break;
|
|
case 1:
|
|
mp->flags |= MDF_ATTR;
|
|
break;
|
|
case 2:
|
|
mp->flags &= ~MDF_16BITS;
|
|
break;
|
|
}
|
|
err = pcic_memory(devi->slt, rid);
|
|
break;
|
|
}
|
|
default:
|
|
err = EOPNOTSUPP;
|
|
}
|
|
return (err);
|
|
}
|
|
|
|
static int
|
|
pcic_get_res_flags(device_t bus, device_t child, int restype, int rid,
|
|
u_long *value)
|
|
{
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
int err = 0;
|
|
|
|
if (value == 0)
|
|
return (ENOMEM);
|
|
|
|
switch (restype) {
|
|
case SYS_RES_IOPORT: {
|
|
struct io_desc *ip = &devi->slt->io[rid];
|
|
*value = ip->flags;
|
|
break;
|
|
}
|
|
case SYS_RES_MEMORY: {
|
|
struct mem_desc *mp = &devi->slt->mem[rid];
|
|
*value = mp->flags;
|
|
break;
|
|
}
|
|
default:
|
|
err = EOPNOTSUPP;
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
pcic_set_memory_offset(device_t bus, device_t child, int rid, u_int32_t offset,
|
|
u_int32_t *deltap)
|
|
{
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
struct mem_desc *mp = &devi->slt->mem[rid];
|
|
|
|
mp->card = offset;
|
|
if (deltap)
|
|
*deltap = 0; /* XXX BAD XXX */
|
|
return (pcic_memory(devi->slt, rid));
|
|
}
|
|
|
|
static int
|
|
pcic_get_memory_offset(device_t bus, device_t child, int rid, u_int32_t *offset)
|
|
{
|
|
struct pccard_devinfo *devi = device_get_ivars(child);
|
|
struct mem_desc *mp = &devi->slt->mem[rid];
|
|
|
|
if (offset == 0)
|
|
return (ENOMEM);
|
|
|
|
*offset = mp->card;
|
|
|
|
return (0);
|
|
}
|
|
|
|
static device_method_t pcic_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, pcic_probe),
|
|
DEVMETHOD(device_attach, pcic_attach),
|
|
DEVMETHOD(device_detach, bus_generic_detach),
|
|
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
|
DEVMETHOD(device_suspend, bus_generic_suspend),
|
|
DEVMETHOD(device_resume, bus_generic_resume),
|
|
|
|
/* Bus interface */
|
|
DEVMETHOD(bus_print_child, bus_generic_print_child),
|
|
DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
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DEVMETHOD(bus_release_resource, bus_generic_release_resource),
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DEVMETHOD(bus_activate_resource, pcic_activate_resource),
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|
DEVMETHOD(bus_deactivate_resource, pcic_deactivate_resource),
|
|
DEVMETHOD(bus_setup_intr, pcic_setup_intr),
|
|
DEVMETHOD(bus_teardown_intr, pcic_teardown_intr),
|
|
|
|
/* Card interface */
|
|
DEVMETHOD(card_set_res_flags, pcic_set_res_flags),
|
|
DEVMETHOD(card_get_res_flags, pcic_get_res_flags),
|
|
DEVMETHOD(card_set_memory_offset, pcic_set_memory_offset),
|
|
DEVMETHOD(card_get_memory_offset, pcic_get_memory_offset),
|
|
|
|
{ 0, 0 }
|
|
};
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|
|
|
devclass_t pcic_devclass;
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|
|
|
static driver_t pcic_driver = {
|
|
"pcic",
|
|
pcic_methods,
|
|
sizeof(int)
|
|
};
|
|
|
|
DRIVER_MODULE(pcic, isa, pcic_driver, pcic_devclass, 0, 0);
|