freebsd-dev/sys/boot/fdt/dts/arm64/a64.dtsi

/*-
 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

/ {
	cpus {
		cpu@0 {
			clocks = <&cpu>;
			clock-latency = <2000000>;
			operating-points = <
				/* kHz    uV */
				1200000 1300000
				1008000 1200000
				816000  1100000
				648000  1040000
				408000  1040000
				>;
		};
	};

	clocks {
		pll_hsic: clk@01c20044 {
			#clock-cells = <0>;
			compatible = "allwinner,sun50i-a64-pllhsic-clk";
			reg = <0x01c20044 0x4>;
			clocks = <&osc24M>;
			clock-output-names = "pll_hsic";
		};

		usb_clk: clk@01c200cc {
			#clock-cells = <1>;
			#reset-cells = <1>;
			compatible = "allwinner,sun8i-a83t-usb-clk";
			reg = <0x01c200cc 0x4>;
			clocks = <&osc24M>, <&pll_hsic>;
			clock-indices = <8>, <9>,
					<10>, <11>,
					<16>, <17>;
			clock-output-names = "usb_phy0", "usb_phy1",
					     "usb_hsic_pll", "usb_hsic_12m",
					     "usb_otg_ohci", "usb_ohci0";
		};

		ths_clk: clk@01c20074 {
			#clock-cells = <0>;
			compatible = "allwinner,sun50i-a64-ths-clk";
			reg = <0x01c20074 0x4>;
			clocks = <&osc24M>;
			clock-output-names = "ths";
		};
	};

	soc {
		watchdog: watchdog@01c20ca0 {
			compatible = "allwinner,sun6i-a31-wdt";
			reg = <0x01c20ca0 0x20>;
			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&osc24M>;
		};

		nmi_intc: interrupt-controller@01f00c0c {
			compatible = "allwinner,sun6i-a31-sc-nmi";
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x01f00c0c 0x38>;
			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
		};

		r_rsb: i2c@01f03400 {
			compatible = "allwinner,sun8i-a23-rsb";
			reg = <0x01f03400 0x400>;
			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
			clock-frequency = <3000000>;
			pinctrl-names = "default";
			pinctrl-0 = <&r_rsb_pins>;
			status = "disabled";
			#address-cells = <1>;
			#size-cells = <0>;
		};

		sid: eeprom@01c14000 {
			compatible = "allwinner,sun8i-a83t-sid";
			reg = <0x01c14000 0x400>;
		};

		rtp: rtp@01c25000 {
			compatible = "allwinner,sun50i-a64-ts";
			reg = <0x01c25000 0x400>;
			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&bus_gates 72>, <&ths_clk>;
			clock-names = "ahb", "ths";
			resets = <&ahb_rst 136>;
			#thermal-sensor-cells = <0>;
		};

		usbphy: phy@01c19400 {
			compatible = "allwinner,sun50i-a64-usb-phy";
			reg = <0x01c19400 0x24 0x01c1a800 0x4 0x01c1b800 0x4>;
			reg-names = "phy_ctrl", "pmu1", "pmu2";
			clocks = <&usb_clk 8>,
				 <&usb_clk 9>;
			clock-names = "usb0_phy",
				      "usb1_phy";
			resets = <&usb_clk 0>,
				 <&usb_clk 1>;
			reset-names = "usb0_reset",
				      "usb1_reset";
			status = "disabled";
			#phy-cells = <1>;
		};

		ohci0: usb@01c1a400 {
			compatible = "generic-ohci";
			reg = <0x01c1a400 0x100>;
			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&bus_gates 28>, <&usb_clk 16>, <&usb_clk 17>;
			resets = <&ahb_rst 28>;
			phys = <&usbphy 1>;
			phy-names = "usb";
			status = "disabled";
		};

		ehci0: usb@01c1a000 {
			compatible = "allwinner,sun8i-a83t-ehci", "generic-ehci";
			reg = <0x01c1a000 0x100>;
			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&bus_gates 24>;
			resets = <&ahb_rst 24>;
			phys = <&usbphy 1>;
			phy-names = "usb";
			status = "disabled";
		};

		ohci1: usb@01c1b400 {
			compatible = "generic-ohci";
			reg = <0x01c1b400 0x100>;
			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&bus_gates 29>, <&usb_clk 16>, <&usb_clk 17>;
			resets = <&ahb_rst 29>;
			phys = <&usbphy 2>;
			phy-names = "usb";
			status = "disabled";
		};

		ehci1: usb@01c1b000 {
			compatible = "allwinner,sun8i-a83t-ehci", "generic-ehci";
			reg = <0x01c1b000 0x100>;
			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&bus_gates 25>;
			resets = <&ahb_rst 25>;
			phys = <&usbphy 2>;
			phy-names = "usb";
			status = "disabled";
		};
	};
};

&pio {
	r_rsb_pins: r_rsb {
		allwinner,pins = "PL0", "PL1";
		allwinner,function = "s_rsb";
		allwinner,drive = <SUN4I_PINCTRL_20_MA>;
		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
	};
};