0aeed3e993
Freescale's QorIQ line includes a new ethernet controller, based on their Datapath Acceleration Architecture (DPAA). This uses a combination of a Frame manager, Buffer manager, and Queue manager to improve performance across all interfaces by being able to pass data directly between hardware acceleration interfaces. As part of this import, Freescale's Netcomm Software (ncsw) driver is imported. This was an attempt by Freescale to create an OS-agnostic sub-driver for managing the hardware, using shims to interface to the OS-specific APIs. This work was abandoned, and Freescale's primary work is in the Linux driver (dual BSD/GPL license). Hence, this was imported directly to sys/contrib, rather than going through the vendor area. Going forward, FreeBSD-specific changes may be made to the ncsw code, diverging from the upstream in potentially incompatible ways. An alternative could be to import the Linux driver itself, using the linuxKPI layer, as that would maintain parity with the vendor-maintained driver. However, the Linux driver has not been evaluated for reliability yet, and may have issues with the import, whereas the ncsw-based driver in this commit was completed by Semihalf 4 years ago, and is very stable. Other SoC modules based on DPAA, which could be added in the future: * Security and Encryption engine (SEC4.x, SEC5.x) * RAID engine Additional work to be done: * Implement polling mode * Test vlan support * Add support for the Pattern Matching Engine, which can do regular expression matching on packets. This driver has been tested on the P5020 QorIQ SoC. Others listed in the dtsec(4) manual page are expected to work as the same DPAA engine is included in all. Obtained from: Semihalf Relnotes: Yes Sponsored by: Alex Perez/Inertial Computing
431 lines
19 KiB
C
431 lines
19 KiB
C
/* Copyright (c) 2008-2011 Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**************************************************************************//**
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@File ncsw_ext.h
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@Description General NetCommSw Standard Definitions
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*//***************************************************************************/
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#ifndef __NCSW_EXT_H
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#define __NCSW_EXT_H
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#include "memcpy_ext.h"
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#define WRITE_BLOCK IOMemSet32
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#define COPY_BLOCK Mem2IOCpy32
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#define PTR_TO_UINT(_ptr) ((uintptr_t)(_ptr))
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#define UINT_TO_PTR(_val) ((void*)(uintptr_t)(_val))
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#define PTR_MOVE(_ptr, _offset) (void*)((uint8_t*)(_ptr) + (_offset))
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#define WRITE_UINT8_UINT24(arg, data08, data24) WRITE_UINT32(arg,((uint32_t)(data08)<<24)|((uint32_t)(data24)&0x00FFFFFF))
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#define WRITE_UINT24_UINT8(arg, data24, data08) WRITE_UINT32(arg,((uint32_t)(data24)<< 8)|((uint32_t)(data08)&0x000000FF))
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/* Little-Endian access macros */
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#define WRITE_UINT16_LE(arg, data) \
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WRITE_UINT16((arg), SwapUint16(data))
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#define WRITE_UINT32_LE(arg, data) \
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WRITE_UINT32((arg), SwapUint32(data))
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#define WRITE_UINT64_LE(arg, data) \
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WRITE_UINT64((arg), SwapUint64(data))
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#define GET_UINT16_LE(arg) \
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SwapUint16(GET_UINT16(arg))
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#define GET_UINT32_LE(arg) \
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SwapUint32(GET_UINT32(arg))
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#define GET_UINT64_LE(arg) \
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SwapUint64(GET_UINT64(arg))
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/* Write and Read again macros */
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#define WRITE_UINT_SYNC(size, arg, data) \
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do { \
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WRITE_UINT##size((arg), (data)); \
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CORE_MemoryBarrier(); \
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} while (0)
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#define WRITE_UINT8_SYNC(arg, data) WRITE_UINT_SYNC(8, (arg), (data))
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#define WRITE_UINT16_SYNC(arg, data) WRITE_UINT_SYNC(16, (arg), (data))
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#define WRITE_UINT32_SYNC(arg, data) WRITE_UINT_SYNC(32, (arg), (data))
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#define MAKE_UINT64(high32, low32) (((uint64_t)high32 << 32) | (low32))
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/*----------------------*/
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/* Miscellaneous macros */
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/*----------------------*/
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#define UNUSED(X) (X=X)
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#define KILOBYTE 0x400UL /* 1024 */
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#define MEGABYTE (KILOBYTE * KILOBYTE) /* 1024*1024 */
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#define GIGABYTE (KILOBYTE * MEGABYTE) /* 1024*1024*1024 */
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#undef NO_IRQ
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#define NO_IRQ (-1)
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#define NCSW_MASTER_ID (0)
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/* Macro for checking if a number is a power of 2 */
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#define POWER_OF_2(n) (!((n) & ((n)-1)))
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/* Macro for calculating log of base 2 */
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#define LOG2(num, log2Num) \
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do \
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{ \
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uint64_t tmp = (num); \
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log2Num = 0; \
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while (tmp > 1) \
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{ \
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log2Num++; \
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tmp >>= 1; \
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} \
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} while (0)
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#define NEXT_POWER_OF_2(_num, _nextPow) \
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do \
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{ \
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if (POWER_OF_2(_num)) \
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_nextPow = (_num); \
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else \
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{ \
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uint64_t tmp = (_num); \
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_nextPow = 1; \
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while (tmp) \
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{ \
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_nextPow <<= 1; \
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tmp >>= 1; \
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} \
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} \
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} while (0)
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/* Ceiling division - not the fastest way, but safer in terms of overflow */
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#define DIV_CEIL(x,y) (((x)/(y)) + ((((((x)/(y)))*(y)) == (x)) ? 0 : 1))
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/* Round up a number to be a multiple of a second number */
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#define ROUND_UP(x,y) ((((x) + (y) - 1) / (y)) * (y))
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/* Timing macro for converting usec units to number of ticks. */
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/* (number of usec * clock_Hz) / 1,000,000) - since */
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/* clk is in MHz units, no division needed. */
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#define USEC_TO_CLK(usec,clk) ((usec) * (clk))
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#define CYCLES_TO_USEC(cycles,clk) ((cycles) / (clk))
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/* Timing macros for converting between nsec units and number of clocks. */
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#define NSEC_TO_CLK(nsec,clk) DIV_CEIL(((nsec) * (clk)), 1000)
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#define CYCLES_TO_NSEC(cycles,clk) (((cycles) * 1000) / (clk))
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/* Timing macros for converting between psec units and number of clocks. */
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#define PSEC_TO_CLK(psec,clk) DIV_CEIL(((psec) * (clk)), 1000000)
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#define CYCLES_TO_PSEC(cycles,clk) (((cycles) * 1000000) / (clk))
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/* Min, Max macros */
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#define NCSW_MIN(a,b) ((a) < (b) ? (a) : (b))
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#define NCSW_MAX(a,b) ((a) > (b) ? (a) : (b))
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#define IN_RANGE(min,val,max) ((min)<=(val) && (val)<=(max))
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#define ABS(a) ((a<0)?(a*-1):a)
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#if !(defined(ARRAY_SIZE))
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#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
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#endif /* !defined(ARRAY_SIZE) */
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/* possible alignments */
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#define HALF_WORD_ALIGNMENT 2
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#define WORD_ALIGNMENT 4
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#define DOUBLE_WORD_ALIGNMENT 8
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#define BURST_ALIGNMENT 32
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#define HALF_WORD_ALIGNED 0x00000001
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#define WORD_ALIGNED 0x00000003
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#define DOUBLE_WORD_ALIGNED 0x00000007
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#define BURST_ALIGNED 0x0000001f
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#ifndef IS_ALIGNED
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#define IS_ALIGNED(n,align) (!((uint32_t)(n) & (align - 1)))
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#endif /* IS_ALIGNED */
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#define LAST_BUF 1
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#define FIRST_BUF 2
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#define SINGLE_BUF (LAST_BUF | FIRST_BUF)
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#define MIDDLE_BUF 4
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#define ARRAY_END -1
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#define ILLEGAL_BASE (~0)
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#define BUF_POSITION(first, last) state[(!!(last))<<1 | !!(first)]
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#define DECLARE_POSITION static uint8_t state[4] = { (uint8_t)MIDDLE_BUF, (uint8_t)FIRST_BUF, (uint8_t)LAST_BUF, (uint8_t)SINGLE_BUF };
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/**************************************************************************//**
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@Description Timers operation mode
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*//***************************************************************************/
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typedef enum e_TimerMode
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{
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e_TIMER_MODE_INVALID = 0,
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e_TIMER_MODE_FREE_RUN, /**< Free run - counter continues to increase
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after reaching the reference value. */
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e_TIMER_MODE_PERIODIC, /**< Periodic - counter restarts counting from 0
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after reaching the reference value. */
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e_TIMER_MODE_SINGLE /**< Single (one-shot) - counter stops counting
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after reaching the reference value. */
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} e_TimerMode;
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/**************************************************************************//**
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@Description Enumeration (bit flags) of communication modes (Transmit,
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receive or both).
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*//***************************************************************************/
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typedef enum e_CommMode
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{
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e_COMM_MODE_NONE = 0, /**< No transmit/receive communication */
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e_COMM_MODE_RX = 1, /**< Only receive communication */
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e_COMM_MODE_TX = 2, /**< Only transmit communication */
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e_COMM_MODE_RX_AND_TX = 3 /**< Both transmit and receive communication */
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} e_CommMode;
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/**************************************************************************//**
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@Description General Diagnostic Mode
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*//***************************************************************************/
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typedef enum e_DiagMode
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{
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e_DIAG_MODE_NONE = 0, /**< Normal operation; no diagnostic mode */
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e_DIAG_MODE_CTRL_LOOPBACK, /**< Loopback in the controller */
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e_DIAG_MODE_CHIP_LOOPBACK, /**< Loopback in the chip but not in the
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controller; e.g. IO-pins, SerDes, etc. */
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e_DIAG_MODE_PHY_LOOPBACK, /**< Loopback in the external PHY */
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e_DIAG_MODE_EXT_LOOPBACK, /**< Loopback in the external line (beyond the PHY) */
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e_DIAG_MODE_CTRL_ECHO, /**< Echo incoming data by the controller */
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e_DIAG_MODE_PHY_ECHO /**< Echo incoming data by the PHY */
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} e_DiagMode;
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/**************************************************************************//**
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@Description Possible RxStore callback responses.
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*//***************************************************************************/
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typedef enum e_RxStoreResponse
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{
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e_RX_STORE_RESPONSE_PAUSE /**< Pause invoking callback with received data;
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in polling mode, start again invoking callback
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only next time user invokes the receive routine;
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in interrupt mode, start again invoking callback
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only next time a receive event triggers an interrupt;
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in all cases, received data that are pending are not
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lost, rather, their processing is temporarily deferred;
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in all cases, received data are processed in the order
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in which they were received. */
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, e_RX_STORE_RESPONSE_CONTINUE /**< Continue invoking callback with received data. */
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} e_RxStoreResponse;
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/**************************************************************************//**
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@Description General Handle
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*//***************************************************************************/
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typedef void * t_Handle; /**< handle, used as object's descriptor */
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/**************************************************************************//**
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@Description MUTEX type
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*//***************************************************************************/
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typedef uint32_t t_Mutex;
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/**************************************************************************//**
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@Description Error Code.
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The high word of the error code is the code of the software
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module (driver). The low word is the error type (e_ErrorType).
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To get the values from the error code, use GET_ERROR_TYPE()
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and GET_ERROR_MODULE().
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*//***************************************************************************/
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typedef uint32_t t_Error;
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/**************************************************************************//**
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@Description General prototype of interrupt service routine (ISR).
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@Param[in] handle - Optional handle of the module handling the interrupt.
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@Return None
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*//***************************************************************************/
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typedef void (t_Isr)(t_Handle handle);
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/**************************************************************************//**
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@Anchor mem_attr
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@Collection Memory Attributes
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Various attributes of memory partitions. These values may be
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or'ed together to create a mask of all memory attributes.
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@{
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*//***************************************************************************/
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#define MEMORY_ATTR_CACHEABLE 0x00000001
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/**< Memory is cacheable */
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#define MEMORY_ATTR_QE_2ND_BUS_ACCESS 0x00000002
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/**< Memory can be accessed by QUICC Engine
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through its secondary bus interface */
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/* @} */
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/**************************************************************************//**
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@Function t_GetBufFunction
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@Description User callback function called by driver to get data buffer.
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User provides this function. Driver invokes it.
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@Param[in] h_BufferPool - A handle to buffer pool manager
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@Param[out] p_BufContextHandle - Returns the user's private context that
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should be associated with the buffer
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@Return Pointer to data buffer, NULL if error
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*//***************************************************************************/
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typedef uint8_t * (t_GetBufFunction)(t_Handle h_BufferPool,
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t_Handle *p_BufContextHandle);
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/**************************************************************************//**
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@Function t_PutBufFunction
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@Description User callback function called by driver to return data buffer.
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User provides this function. Driver invokes it.
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@Param[in] h_BufferPool - A handle to buffer pool manager
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@Param[in] p_Buffer - A pointer to buffer to return
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@Param[in] h_BufContext - The user's private context associated with
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the returned buffer
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@Return E_OK on success; Error code otherwise
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*//***************************************************************************/
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typedef t_Error (t_PutBufFunction)(t_Handle h_BufferPool,
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uint8_t *p_Buffer,
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t_Handle h_BufContext);
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/**************************************************************************//**
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@Function t_PhysToVirt
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@Description Translates a physical address to the matching virtual address.
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@Param[in] addr - The physical address to translate.
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@Return Virtual address.
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*//***************************************************************************/
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typedef void * t_PhysToVirt(physAddress_t addr);
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/**************************************************************************//**
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@Function t_VirtToPhys
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@Description Translates a virtual address to the matching physical address.
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@Param[in] addr - The virtual address to translate.
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@Return Physical address.
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*//***************************************************************************/
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typedef physAddress_t t_VirtToPhys(void *addr);
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/**************************************************************************//**
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@Description Buffer Pool Information Structure.
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*//***************************************************************************/
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typedef struct t_BufferPoolInfo
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{
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t_Handle h_BufferPool; /**< A handle to the buffer pool manager */
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t_GetBufFunction *f_GetBuf; /**< User callback to get a free buffer */
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t_PutBufFunction *f_PutBuf; /**< User callback to return a buffer */
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uint16_t bufferSize; /**< Buffer size (in bytes) */
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t_PhysToVirt *f_PhysToVirt; /**< User callback to translate pool buffers
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physical addresses to virtual addresses */
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t_VirtToPhys *f_VirtToPhys; /**< User callback to translate pool buffers
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virtual addresses to physical addresses */
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} t_BufferPoolInfo;
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/**************************************************************************//**
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@Description User callback function called by driver when transmit completed.
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User provides this function. Driver invokes it.
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@Param[in] h_App - Application's handle, as was provided to the
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driver by the user
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@Param[in] queueId - Transmit queue ID
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@Param[in] p_Data - Pointer to the data buffer
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@Param[in] h_BufContext - The user's private context associated with
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the given data buffer
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@Param[in] status - Transmit status and errors
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@Param[in] flags - Driver-dependent information
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*//***************************************************************************/
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typedef void (t_TxConfFunction)(t_Handle h_App,
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uint32_t queueId,
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uint8_t *p_Data,
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t_Handle h_BufContext,
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uint16_t status,
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uint32_t flags);
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/**************************************************************************//**
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@Description User callback function called by driver with receive data.
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User provides this function. Driver invokes it.
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@Param[in] h_App - Application's handle, as was provided to the
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driver by the user
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@Param[in] queueId - Receive queue ID
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@Param[in] p_Data - Pointer to the buffer with received data
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@Param[in] h_BufContext - The user's private context associated with
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the given data buffer
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@Param[in] length - Length of received data
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@Param[in] status - Receive status and errors
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@Param[in] position - Position of buffer in frame
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@Param[in] flags - Driver-dependent information
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@Retval e_RX_STORE_RESPONSE_CONTINUE - order the driver to continue Rx
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operation for all ready data.
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@Retval e_RX_STORE_RESPONSE_PAUSE - order the driver to stop Rx operation.
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*//***************************************************************************/
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typedef e_RxStoreResponse (t_RxStoreFunction)(t_Handle h_App,
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uint32_t queueId,
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uint8_t *p_Data,
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t_Handle h_BufContext,
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uint32_t length,
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uint16_t status,
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uint8_t position,
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uint32_t flags);
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#endif /* __NCSW_EXT_H */
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