463 lines
14 KiB
Groff
463 lines
14 KiB
Groff
.\" Copyright (c) 1998, 1999, Nicolas Souchu
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.\" All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\"
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.Dd June 6, 1998
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.Dt MICROSEQ 9
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.Os FreeBSD
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.Sh NAME
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.Nm microseq
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.Nd
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ppbus microseqencer developer's guide
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.Sh SYNOPSIS
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.Fd "#include <dev/ppbus/ppb_msq.h>"
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.Sh DESCRIPTION
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See
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.Xr ppbus 4
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for ppbus description and general info about the microsequencer.
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.Pp
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The purpose of this document is to encourage developers to use the
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microsequencer mechanism in order to have:
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.Bl -enum -offset indent
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.It
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a uniform programming model
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.It
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efficient code
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.El
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.Pp
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Before using microsequences, you are encouraged to look at
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.Xr ppc 4
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microsequencer implementation and an example of how using it in
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.Xr vpo 4 .
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.Sh PPBUS register model
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.Ss Background
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The parallel port model chosen for ppbus is the PC parallel port model.
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Thus, any register described later has the same semantic than its counterpart
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in a PC parallel port. For more info about ISA/ECP programming, get the
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Microsoft standard referenced as "Extended Capabilities Port Protocol and
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ISA interface Standard". Registers described later are standard parallel port
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registers.
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.Pp
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Mask macros are defined in the standard ppbus include files for each valid
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bit of parallel port registers.
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.Ss Data register
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In compatible or nibble mode, writing to this register will drive data to the
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parallel port data lines. In any other mode, drivers may be tri-stated by
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setting the direction bit (PCD) in the control register. Reads to this register
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return the value on the data lines.
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.Ss Device status register
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This read-only register reflects the inputs on the parallel port interface.
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.Pp
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.Bl -column "Bit" "Name" "Description" -compact
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.It Em Bit Ta Em Name Ta Em Description
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.It 7 Ta nBUSY Ta "inverted version of parallel port Busy signal"
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.It 6 Ta nACK Ta "version of parallel port nAck signal"
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.It 5 Ta PERROR Ta "version of parallel port PERROR signal"
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.It 4 Ta SELECT Ta "version of parallel port Select signal"
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.It 3 Ta nFAULT Ta "version of parallel port nFault signal"
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.El
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.Pp
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Others are reserved and return undefined result when read.
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.Ss Device control register
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This register directly controls several output signals as well as enabling
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some functions.
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.Pp
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.Bl -column "Bit" "Name " "Description" -compact
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.It Em Bit Ta Em Name Ta Em Description
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.It 5 Ta PCD Ta "direction bit in extended modes"
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.It 4 Ta IRQENABLE Ta "1 enables an interrupt on the rising edge of nAck"
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.It 3 Ta SELECTIN Ta "inverted and driven as parallel port nSelectin signal"
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.It 2 Ta nINIT Ta "driven as parallel port nInit signal"
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.It 1 Ta AUTOFEED Ta "inverted and driven as parallel port nAutoFd signal"
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.It 0 Ta STROBE Ta "inverted and driven as parallel port nStrobe signal"
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.El
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.Sh MICROINSTRUCTIONS
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.Ss Description
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.Em Microinstructions
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are either parallel port accesses, program iterations, submicrosequence or
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C calls. The parallel port must be considered as the logical model described in
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.Xr ppbus 4 .
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.Pp
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Available microinstructions are:
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.Bd -literal
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#define MS_OP_GET 0 /* get <ptr>, <len> */
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#define MS_OP_PUT 1 /* put <ptr>, <len> */
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#define MS_OP_RFETCH 2 /* rfetch <reg>, <mask>, <ptr> */
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#define MS_OP_RSET 3 /* rset <reg>, <mask>, <mask> */
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#define MS_OP_RASSERT 4 /* rassert <reg>, <mask> */
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#define MS_OP_DELAY 5 /* delay <val> */
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#define MS_OP_SET 6 /* set <val> */
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#define MS_OP_DBRA 7 /* dbra <offset> */
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#define MS_OP_BRSET 8 /* brset <mask>, <offset> */
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#define MS_OP_BRCLEAR 9 /* brclear <mask>, <offset> */
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#define MS_OP_RET 10 /* ret <retcode> */
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#define MS_OP_C_CALL 11 /* c_call <function>, <parameter> */
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#define MS_OP_PTR 12 /* ptr <pointer> */
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#define MS_OP_ADELAY 13 /* adelay <val> */
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#define MS_OP_BRSTAT 14 /* brstat <mask>, <mask>, <offset> */
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#define MS_OP_SUBRET 15 /* subret <code> */
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#define MS_OP_CALL 16 /* call <microsequence> */
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#define MS_OP_RASSERT_P 17 /* rassert_p <iter>, <reg> */
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#define MS_OP_RFETCH_P 18 /* rfetch_p <iter>, <reg>, <mask> */
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#define MS_OP_TRIG 19 /* trigger <reg>, <len>, <array> */
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.Ed
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.Ss Execution context
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The
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.Em execution context
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of microinstructions is:
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.Bl -bullet -item -offset indent
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.It
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the
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.Em program counter
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which points to the next microinstruction to execute either in the main
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microsequence or in a subcall
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.It
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the current value of
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.Em ptr
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which points to the next char to send/receive
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.It
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the current value of the internal
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.Em branch register
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.El
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.Pp
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This data is modified by some of the microinstructions, not all.
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.Ss MS_OP_GET and MS_OP_PUT
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are microinstructions used to do either predefined standard IEEE1284-1994
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transfers or programmed non-standard io.
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.Ss MS_OP_RFETCH - Register FETCH
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is used to retrieve the current value of a parallel port register, apply a
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mask and save it in a buffer.
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.Pp
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Parameters:
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.Bl -enum -offset indent
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.It
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register
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.It
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character mask
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.It
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pointer to the buffer
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.El
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.Pp
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Predefined macro: MS_RFETCH(reg,mask,ptr)
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.Ss MS_OP_RSET - Register SET
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is used to assert/clear some bits of a particular parallel port register,
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two masks are applied.
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.Pp
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Parameters:
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.Bl -enum -offset ident
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.It
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register
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.It
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mask of bits to assert
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.It
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mask of bits to clear
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.El
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.Pp
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Predefined macro: MS_RSET(reg,assert,clear)
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.Ss MS_OP_RASSERT - Register ASSERT
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is used to assert all bits of a particular parallel port register.
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.Pp
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Parameters:
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.Bl -enum -offset ident
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.It
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register
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.It
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byte to assert
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.El
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.Pp
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Predefined macro: MS_RASSERT(reg,byte)
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.Ss MS_OP_DELAY - microsecond DELAY
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is used to delay the execution of the microsequence.
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.Pp
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Parameter:
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.Bl -enum -offset ident
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.It
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delay in microseconds
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.El
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.Pp
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Predefined macro: MS_DELAY(delay)
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.Ss MS_OP_SET - SET internal branch register
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is used to set the value of the internal branch register.
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.Pp
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Parameter:
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.Bl -enum -offset ident
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.It
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integer value
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.El
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.Pp
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Predefined macro: MS_SET(accum)
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.Ss MS_OP_DBRA - Do BRAnch
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is used to branch if internal branch register decremented by one result value
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is positive.
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.Pp
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Parameter:
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.Bl -enum -offset ident
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.It
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integer offset in the current executed (sub)microsequence. Offset is added to
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the index of the next microinstruction to execute.
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.El
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.Pp
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Predefined macro: MS_DBRA(offset)
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.Ss MS_OP_BRSET - BRanch on SET
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is used to branch if some of the status register bits of the parallel port
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are set.
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.Pp
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Parameter:
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.Bl -enum -offset ident
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.It
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bits of the status register
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.It
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integer offset in the current executed (sub)microsequence. Offset is added to
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the index of the next microinstruction to execute.
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.El
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.Pp
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Predefined macro: MS_BRSET(mask,offset)
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.Ss MS_OP_BRCLEAR - BRanch on CLEAR
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is used to branch if some of the status register bits of the parallel port
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are cleared.
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.Pp
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Parameter:
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.Bl -enum -offset ident
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.It
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bits of the status register
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.It
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integer offset in the current executed (sub)microsequence. Offset is added to
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the index of the next microinstruction to execute.
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.El
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.Pp
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Predefined macro: MS_BRCLEAR(mask,offset)
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.Ss MS_OP_RET - RETurn
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is used to return from a microsequence. This instruction is mandatory. This
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is the only way for the microsequencer to detect the end of the microsequence.
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The return code is returned in the integer pointed by the (int *) parameter
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of the ppb_MS_microseq().
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.Pp
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Parameter:
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.Bl -enum -offset ident
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.It
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integer return code
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.El
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.Pp
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Predefined macro: MS_RET(code)
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.Ss MS_OP_C_CALL - C function CALL
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is used to call C functions from microsequence execution. This may be useful
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when a non-standard i/o is performed to retrieve a data character from the
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parallel port.
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.Pp
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Parameter:
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.Bl -enum -offset ident
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.It
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the C function to call
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.It
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the parameter to pass to the function call
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.El
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.Pp
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The C function shall be declared as a
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.Fd int(*)(void *p, char *ptr)
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The ptr parameter is the current position in the buffer currently scanned.
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.Pp
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Predefined macro: MS_C_CALL(func,param)
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.Ss MS_OP_PTR - initialize internal PTR
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is used to initialize the internal pointer to the currently scanned buffer.
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This pointer is passed to any C call (see above).
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.Pp
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Parameter:
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.Bl -enum -offset ident
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.It
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pointer to the buffer that shall be accessed by xxx_P() microsequence calls.
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Note that this pointer is automatically incremented during xxx_P() calls
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.El
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.Pp
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Predefined macro: MS_PTR(ptr)
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.Ss MS_OP_ADELAY - do an Asynchronous DELAY
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is used to make a tsleep() during microsequence execution. The tsleep is
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executed at PPBPRI level.
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.Pp
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Parameter:
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.Bl -enum -offset ident
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.It
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delay in ms
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.El
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.Pp
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Predefined macro: MS_ADELAY(delay)
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.Ss MS_OP_BRSTAT - BRanch on STATe
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is used to branch on status register state condition.
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.Pp
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Parameter:
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.Bl -enum -offset ident
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.It
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mask of asserted bits. Bits that shall be asserted in the status register
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are set in the mask
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.It
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mask of cleared bits. Bits that shall be cleared in the status register
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are set in the mask
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.It
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integer offset in the current executed (sub)microsequence. Offset is added
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to the index of the next microinstruction to execute.
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.El
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.Pp
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Predefined macro: MS_BRSTAT(asserted_bits,clear_bits,offset)
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.Ss MS_OP_SUBRET - SUBmicrosequence RETurn
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is used to return from the submicrosequence call. This action is mandatory
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before a RET call. Some microinstructions (PUT, GET) may not be callable
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within a submicrosequence.
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.Pp
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No parameter.
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.Pp
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Predefined macro: MS_SUBRET()
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.Ss MS_OP_CALL - submicrosequence CALL
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is used to call a submicrosequence. A submicrosequence is a microsequence with
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a SUBRET call.
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Parameter:
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.Bl -enum -offset ident
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.It
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the submicrosequence to execute
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.El
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.Pp
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Predefined macro: MS_CALL(microseq)
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.Ss MS_OP_RASSERT_P - Register ASSERT from internal PTR
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is used to assert a register with data currently pointed by the internal PTR
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pointer.
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Parameter:
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.Bl -enum -offset ident
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.It
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amount of data to write to the register
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.It
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register
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.El
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.Pp
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Predefined macro: MS_RASSERT_P(iter,reg)
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.Ss MS_OP_RFETCH_P - Register FETCH to internal PTR
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is used to fetch data from a register. Data is stored in the buffer currently
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pointed by the internal PTR pointer.
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Parameter:
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.Bl -enum -offset ident
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.It
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amount of data to read from the register
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.It
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register
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.It
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mask applied to fetched data
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.El
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.Pp
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Predefined macro: MS_RFETCH_P(iter,reg,mask)
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.Ss MS_OP_TRIG - TRIG register
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is used to trigger the parallel port. This microinstruction is intended to
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provide a very efficient control of the parallel port. Triggering a register
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is writing data, wait a while, write data, wait a while... This allows to
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write magic sequences to the port.
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Parameter:
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.Bl -enum -offset ident
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.It
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amount of data to read from the register
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.It
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register
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.It
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size of the array
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.It
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array of unsigned chars. Each couple of u_chars define the data to write to
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the register and the delay in us to wait. The delay is limited to 255 us to
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simplify and reduce the size of the array.
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.El
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.Pp
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Predefined macro: MS_TRIG(reg,len,array)
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.Sh MICROSEQUENCES
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.Ss C structures
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.Bd -literal
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union ppb_insarg {
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int i;
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char c;
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void *p;
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int (* f)(void *, char *);
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};
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struct ppb_microseq {
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int opcode; /* microins. opcode */
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union ppb_insarg arg[PPB_MS_MAXARGS]; /* arguments */
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};
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.Ed
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.Ss Using microsequences
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To instanciate a microsequence, just declare an array of ppb_microseq
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structures and initialize it as needed. You may either use predefined macros
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or code directly your microinstructions according to the ppb_microseq
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definition. For example,
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.Bd -literal
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struct ppb_microseq select_microseq[] = {
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/* parameter list
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*/
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#define SELECT_TARGET MS_PARAM(0, 1, MS_TYP_INT)
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#define SELECT_INITIATOR MS_PARAM(3, 1, MS_TYP_INT)
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/* send the select command to the drive */
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MS_DASS(MS_UNKNOWN),
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MS_CASS(H_nAUTO | H_nSELIN | H_INIT | H_STROBE),
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MS_CASS( H_AUTO | H_nSELIN | H_INIT | H_STROBE),
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MS_DASS(MS_UNKNOWN),
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MS_CASS( H_AUTO | H_nSELIN | H_nINIT | H_STROBE),
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/* now, wait until the drive is ready */
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MS_SET(VP0_SELTMO),
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/* loop: */ MS_BRSET(H_ACK, 2 /* ready */),
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MS_DBRA(-2 /* loop */),
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/* error: */ MS_RET(1),
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/* ready: */ MS_RET(0)
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};
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.Ed
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.Pp
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Here, some parameters are undefined and must be filled before executing
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the microsequence. In order to initialize each microsequence, one
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should use the ppb_MS_init_msq() function like this:
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.Bd -literal
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ppb_MS_init_msq(select_microseq, 2,
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SELECT_TARGET, 1 << target,
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SELECT_INITIATOR, 1 << initiator);
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.Ed
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.Pp
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and then execute the microsequence.
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.Ss The microsequencer
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The microsequencer is executed either at ppbus or adapter level (see
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.Xr ppbus 4
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for info about ppbus system layers). Most of the microsequencer is executed
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at ppc level to avoid ppbus to adapter function call overhead. But some
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actions like deciding whereas the transfer is IEEE1284-1994 compliant are
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executed at ppbus layer.
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.Sh BUGS
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Only one level of submicrosequences is allowed.
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.Pp
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When triggering the port, maximum delay allowed is 255 us.
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.Sh SEE ALSO
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.Xr ppbus 4 ,
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.Xr ppc 4 ,
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.Xr vpo 4
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.Sh HISTORY
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The
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.Nm
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manual page first appeared in
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.Fx 3.0 .
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.Sh AUTHOR
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This
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manual page was written by
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.An Nicolas Souchu .
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