9358cceb97
Reviewed by: imp Tested by: Scott Benesh Differential Revision: https://reviews.freebsd.org/D22598
507 lines
16 KiB
C
507 lines
16 KiB
C
/*-
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* Copyright (c) 2018 Microsemi Corporation.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/* $FreeBSD$ */
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/*
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* Driver for the Microsemi Smart storage controllers
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*/
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#include "smartpqi_includes.h"
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#include "smartpqi_prototypes.h"
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/*
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* Supported devices
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*/
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struct pqi_ident
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{
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u_int16_t vendor;
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u_int16_t device;
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u_int16_t subvendor;
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u_int16_t subdevice;
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int hwif;
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char *desc;
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} pqi_identifiers[] = {
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/* (MSCC PM8205 8x12G based) */
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{0x9005, 0x028f, 0x103c, 0x600, PQI_HWIF_SRCV, "P408i-p SR Gen10"},
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{0x9005, 0x028f, 0x103c, 0x601, PQI_HWIF_SRCV, "P408e-p SR Gen10"},
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{0x9005, 0x028f, 0x103c, 0x602, PQI_HWIF_SRCV, "P408i-a SR Gen10"},
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{0x9005, 0x028f, 0x103c, 0x603, PQI_HWIF_SRCV, "P408i-c SR Gen10"},
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{0x9005, 0x028f, 0x1028, 0x1FE0, PQI_HWIF_SRCV, "SmartRAID 3162-8i/eDell"},
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{0x9005, 0x028f, 0x9005, 0x608, PQI_HWIF_SRCV, "SmartRAID 3162-8i/e"},
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{0x9005, 0x028f, 0x103c, 0x609, PQI_HWIF_SRCV, "P408i-sb SR G10"},
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/* (MSCC PM8225 8x12G based) */
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{0x9005, 0x028f, 0x103c, 0x650, PQI_HWIF_SRCV, "E208i-p SR Gen10"},
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{0x9005, 0x028f, 0x103c, 0x651, PQI_HWIF_SRCV, "E208e-p SR Gen10"},
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{0x9005, 0x028f, 0x103c, 0x652, PQI_HWIF_SRCV, "E208i-c SR Gen10"},
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{0x9005, 0x028f, 0x103c, 0x654, PQI_HWIF_SRCV, "E208i-a SR Gen10"},
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{0x9005, 0x028f, 0x103c, 0x655, PQI_HWIF_SRCV, "P408e-m SR Gen10"},
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/* (MSCC PM8221 8x12G based) */
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{0x9005, 0x028f, 0x103c, 0x700, PQI_HWIF_SRCV, "P204i-c SR Gen10"},
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{0x9005, 0x028f, 0x103c, 0x701, PQI_HWIF_SRCV, "P204i-b SR Gen10"},
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/* (MSCC PM8204 8x12G based) */
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{0x9005, 0x028f, 0x9005, 0x800, PQI_HWIF_SRCV, "SmartRAID 3154-8i"},
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{0x9005, 0x028f, 0x9005, 0x801, PQI_HWIF_SRCV, "SmartRAID 3152-8i"},
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{0x9005, 0x028f, 0x9005, 0x802, PQI_HWIF_SRCV, "SmartRAID 3151-4i"},
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{0x9005, 0x028f, 0x9005, 0x803, PQI_HWIF_SRCV, "SmartRAID 3101-4i"},
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{0x9005, 0x028f, 0x9005, 0x804, PQI_HWIF_SRCV, "SmartRAID 3154-8e"},
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{0x9005, 0x028f, 0x9005, 0x805, PQI_HWIF_SRCV, "SmartRAID 3102-8i"},
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{0x9005, 0x028f, 0x9005, 0x806, PQI_HWIF_SRCV, "SmartRAID 3100"},
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{0x9005, 0x028f, 0x9005, 0x807, PQI_HWIF_SRCV, "SmartRAID 3162-8i"},
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{0x9005, 0x028f, 0x152d, 0x8a22, PQI_HWIF_SRCV, "QS-8204-8i"},
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{0x9005, 0x028f, 0x193d, 0xf460, PQI_HWIF_SRCV, "UN RAID P460-M4"},
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{0x9005, 0x028f, 0x193d, 0xf461, PQI_HWIF_SRCV, "UN RAID P460-B4"},
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{0x9005, 0x028f, 0x1bd4, 0x004b, PQI_HWIF_SRCV, "INSPUR RAID PM8204-2GB"},
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{0x9005, 0x028f, 0x1bd4, 0x004c, PQI_HWIF_SRCV, "INSPUR RAID PM8204-4GB"},
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/* (MSCC PM8222 8x12G based) */
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{0x9005, 0x028f, 0x9005, 0x900, PQI_HWIF_SRCV, "SmartHBA 2100-8i"},
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{0x9005, 0x028f, 0x9005, 0x901, PQI_HWIF_SRCV, "SmartHBA 2100-4i"},
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{0x9005, 0x028f, 0x9005, 0x902, PQI_HWIF_SRCV, "HBA 1100-8i"},
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{0x9005, 0x028f, 0x9005, 0x903, PQI_HWIF_SRCV, "HBA 1100-4i"},
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{0x9005, 0x028f, 0x9005, 0x904, PQI_HWIF_SRCV, "SmartHBA 2100-8e"},
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{0x9005, 0x028f, 0x9005, 0x905, PQI_HWIF_SRCV, "HBA 1100-8e"},
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{0x9005, 0x028f, 0x9005, 0x906, PQI_HWIF_SRCV, "SmartHBA 2100-4i4e"},
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{0x9005, 0x028f, 0x9005, 0x907, PQI_HWIF_SRCV, "HBA 1100"},
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{0x9005, 0x028f, 0x9005, 0x908, PQI_HWIF_SRCV, "SmartHBA 2100"},
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{0x9005, 0x028f, 0x9005, 0x90a, PQI_HWIF_SRCV, "SmartHBA 2100A-8i"},
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{0x9005, 0x028f, 0x193d, 0x8460, PQI_HWIF_SRCV, "UN HBA H460-M1"},
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{0x9005, 0x028f, 0x193d, 0x8461, PQI_HWIF_SRCV, "UN HBA H460-B1"},
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{0x9005, 0x028f, 0x1bd4, 0x004a, PQI_HWIF_SRCV, "INSPUR SMART-HBA PM8222-SHBA"},
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{0x9005, 0x028f, 0x13fe, 0x8312, PQI_HWIF_SRCV, "MIC-8312BridgeB"},
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/* (SRCx MSCC FVB 24x12G based) */
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{0x9005, 0x028f, 0x103c, 0x1001, PQI_HWIF_SRCV, "MSCC FVB"},
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/* (MSCC PM8241 24x12G based) */
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/* (MSCC PM8242 24x12G based) */
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{0x9005, 0x028f, 0x152d, 0x8a37, PQI_HWIF_SRCV, "QS-8242-24i"},
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{0x9005, 0x028f, 0x9005, 0x1300, PQI_HWIF_SRCV, "HBA 1100-8i8e"},
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{0x9005, 0x028f, 0x9005, 0x1301, PQI_HWIF_SRCV, "HBA 1100-24i"},
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{0x9005, 0x028f, 0x9005, 0x1302, PQI_HWIF_SRCV, "SmartHBA 2100-8i8e"},
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{0x9005, 0x028f, 0x9005, 0x1303, PQI_HWIF_SRCV, "SmartHBA 2100-24i"},
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{0x9005, 0x028f, 0x105b, 0x1321, PQI_HWIF_SRCV, "8242-24i"},
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{0x9005, 0x028f, 0x1bd4, 0x0045, PQI_HWIF_SRCV, "INSPUR SMART-HBA 8242-24i"},
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/* (MSCC PM8236 16x12G based) */
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{0x9005, 0x028f, 0x152d, 0x8a24, PQI_HWIF_SRCV, "QS-8236-16i"},
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{0x9005, 0x028f, 0x9005, 0x1380, PQI_HWIF_SRCV, "SmartRAID 3154-16i"},
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{0x9005, 0x028f, 0x1bd4, 0x0046, PQI_HWIF_SRCV, "INSPUR RAID 8236-16i"},
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/* (MSCC PM8237 24x12G based) */
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{0x9005, 0x028f, 0x103c, 0x1100, PQI_HWIF_SRCV, "P816i-a SR Gen10"},
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{0x9005, 0x028f, 0x103c, 0x1101, PQI_HWIF_SRCV, "P416ie-m SR G10"},
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/* (MSCC PM8238 16x12G based) */
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{0x9005, 0x028f, 0x152d, 0x8a23, PQI_HWIF_SRCV, "QS-8238-16i"},
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{0x9005, 0x028f, 0x9005, 0x1280, PQI_HWIF_SRCV, "HBA 1100-16i"},
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{0x9005, 0x028f, 0x9005, 0x1281, PQI_HWIF_SRCV, "HBA 1100-16e"},
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{0x9005, 0x028f, 0x105b, 0x1211, PQI_HWIF_SRCV, "8238-16i"},
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{0x9005, 0x028f, 0x1bd4, 0x0048, PQI_HWIF_SRCV, "INSPUR SMART-HBA 8238-16i"},
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{0x9005, 0x028f, 0x9005, 0x1282, PQI_HWIF_SRCV, "SmartHBA 2100-16i"},
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/* (MSCC PM8240 24x12G based) */
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{0x9005, 0x028f, 0x152d, 0x8a36, PQI_HWIF_SRCV, "QS-8240-24i"},
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{0x9005, 0x028f, 0x9005, 0x1200, PQI_HWIF_SRCV, "SmartRAID 3154-24i"},
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{0x9005, 0x028f, 0x9005, 0x1201, PQI_HWIF_SRCV, "SmartRAID 3154-8i16e"},
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{0x9005, 0x028f, 0x9005, 0x1202, PQI_HWIF_SRCV, "SmartRAID 3154-8i8e"},
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{0x9005, 0x028f, 0x1bd4, 0x0047, PQI_HWIF_SRCV, "INSPUR RAID 8240-24i"},
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{0, 0, 0, 0, 0, 0}
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};
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struct pqi_ident
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pqi_family_identifiers[] = {
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{0x9005, 0x028f, 0, 0, PQI_HWIF_SRCV, "Smart Array Storage Controller"},
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{0, 0, 0, 0, 0, 0}
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};
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/*
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* Function to identify the installed adapter.
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*/
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static struct pqi_ident *
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pqi_find_ident(device_t dev)
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{
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struct pqi_ident *m;
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u_int16_t vendid, devid, sub_vendid, sub_devid;
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vendid = pci_get_vendor(dev);
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devid = pci_get_device(dev);
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sub_vendid = pci_get_subvendor(dev);
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sub_devid = pci_get_subdevice(dev);
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for (m = pqi_identifiers; m->vendor != 0; m++) {
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if ((m->vendor == vendid) && (m->device == devid) &&
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(m->subvendor == sub_vendid) &&
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(m->subdevice == sub_devid)) {
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return (m);
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}
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}
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for (m = pqi_family_identifiers; m->vendor != 0; m++) {
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if ((m->vendor == vendid) && (m->device == devid)) {
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return (m);
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}
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}
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return (NULL);
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}
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/*
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* Determine whether this is one of our supported adapters.
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*/
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static int
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smartpqi_probe(device_t dev)
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{
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struct pqi_ident *id;
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if ((id = pqi_find_ident(dev)) != NULL) {
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device_set_desc(dev, id->desc);
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return(BUS_PROBE_VENDOR);
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}
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return(ENXIO);
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}
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/*
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* Store Bus/Device/Function in softs
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*/
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void pqisrc_save_controller_info(struct pqisrc_softstate *softs)
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{
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device_t dev = softs->os_specific.pqi_dev;
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softs->bus_id = (uint32_t)pci_get_bus(dev);
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softs->device_id = (uint32_t)pci_get_device(dev);
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softs->func_id = (uint32_t)pci_get_function(dev);
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}
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/*
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* Allocate resources for our device, set up the bus interface.
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* Initialize the PQI related functionality, scan devices, register sim to
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* upper layer, create management interface device node etc.
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*/
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static int
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smartpqi_attach(device_t dev)
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{
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struct pqisrc_softstate *softs = NULL;
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struct pqi_ident *id = NULL;
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int error = 0;
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u_int32_t command = 0, i = 0;
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int card_index = device_get_unit(dev);
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rcb_t *rcbp = NULL;
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/*
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* Initialise softc.
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*/
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softs = device_get_softc(dev);
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if (!softs) {
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printf("Could not get softc\n");
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error = EINVAL;
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goto out;
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}
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memset(softs, 0, sizeof(*softs));
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softs->os_specific.pqi_dev = dev;
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DBG_FUNC("IN\n");
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/* assume failure is 'not configured' */
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error = ENXIO;
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/*
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* Verify that the adapter is correctly set up in PCI space.
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*/
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pci_enable_busmaster(softs->os_specific.pqi_dev);
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command = pci_read_config(softs->os_specific.pqi_dev, PCIR_COMMAND, 2);
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if ((command & PCIM_CMD_MEMEN) == 0) {
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DBG_ERR("memory window not available command = %d\n", command);
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error = ENXIO;
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goto out;
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}
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/*
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* Detect the hardware interface version, set up the bus interface
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* indirection.
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*/
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id = pqi_find_ident(dev);
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softs->os_specific.pqi_hwif = id->hwif;
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switch(softs->os_specific.pqi_hwif) {
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case PQI_HWIF_SRCV:
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DBG_INFO("set hardware up for PMC SRCv for %p", softs);
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break;
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default:
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softs->os_specific.pqi_hwif = PQI_HWIF_UNKNOWN;
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DBG_ERR("unknown hardware type\n");
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error = ENXIO;
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goto out;
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}
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pqisrc_save_controller_info(softs);
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/*
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* Allocate the PCI register window.
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*/
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softs->os_specific.pqi_regs_rid0 = PCIR_BAR(0);
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if ((softs->os_specific.pqi_regs_res0 =
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bus_alloc_resource_any(softs->os_specific.pqi_dev, SYS_RES_MEMORY,
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&softs->os_specific.pqi_regs_rid0, RF_ACTIVE)) == NULL) {
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DBG_ERR("couldn't allocate register window 0\n");
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/* assume failure is 'out of memory' */
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error = ENOMEM;
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goto out;
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}
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bus_get_resource_start(softs->os_specific.pqi_dev, SYS_RES_MEMORY,
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softs->os_specific.pqi_regs_rid0);
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softs->pci_mem_handle.pqi_btag = rman_get_bustag(softs->os_specific.pqi_regs_res0);
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softs->pci_mem_handle.pqi_bhandle = rman_get_bushandle(softs->os_specific.pqi_regs_res0);
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/* softs->pci_mem_base_vaddr = (uintptr_t)rman_get_virtual(softs->os_specific.pqi_regs_res0); */
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softs->pci_mem_base_vaddr = (char *)rman_get_virtual(softs->os_specific.pqi_regs_res0);
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/*
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* Allocate the parent bus DMA tag appropriate for our PCI interface.
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*
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* Note that some of these controllers are 64-bit capable.
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*/
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if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */
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PAGE_SIZE, 0, /* algnmnt, boundary */
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BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
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BUS_SPACE_MAXADDR, /* highaddr */
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NULL, NULL, /* filter, filterarg */
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BUS_SPACE_MAXSIZE_32BIT, /* maxsize */
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BUS_SPACE_UNRESTRICTED, /* nsegments */
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BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
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0, /* flags */
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NULL, NULL, /* No locking needed */
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&softs->os_specific.pqi_parent_dmat)) {
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DBG_ERR("can't allocate parent DMA tag\n");
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/* assume failure is 'out of memory' */
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error = ENOMEM;
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goto dma_out;
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}
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softs->os_specific.sim_registered = FALSE;
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softs->os_name = "FreeBSD ";
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/* Initialize the PQI library */
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error = pqisrc_init(softs);
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if (error) {
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DBG_ERR("Failed to initialize pqi lib error = %d\n", error);
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error = PQI_STATUS_FAILURE;
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goto out;
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}
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mtx_init(&softs->os_specific.cam_lock, "cam_lock", NULL, MTX_DEF);
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softs->os_specific.mtx_init = TRUE;
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mtx_init(&softs->os_specific.map_lock, "map_lock", NULL, MTX_DEF);
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callout_init(&softs->os_specific.wellness_periodic, 1);
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callout_init(&softs->os_specific.heartbeat_timeout_id, 1);
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/*
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* Create DMA tag for mapping buffers into controller-addressable space.
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*/
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if (bus_dma_tag_create(softs->os_specific.pqi_parent_dmat,/* parent */
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1, 0, /* algnmnt, boundary */
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BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
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BUS_SPACE_MAXADDR, /* highaddr */
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NULL, NULL, /* filter, filterarg */
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softs->pqi_cap.max_sg_elem*PAGE_SIZE,/*maxsize*/
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softs->pqi_cap.max_sg_elem, /* nsegments */
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BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
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BUS_DMA_ALLOCNOW, /* flags */
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busdma_lock_mutex, /* lockfunc */
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&softs->os_specific.map_lock, /* lockfuncarg*/
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&softs->os_specific.pqi_buffer_dmat)) {
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DBG_ERR("can't allocate buffer DMA tag for pqi_buffer_dmat\n");
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return (ENOMEM);
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}
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rcbp = &softs->rcb[1];
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for( i = 1; i <= softs->pqi_cap.max_outstanding_io; i++, rcbp++ ) {
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if ((error = bus_dmamap_create(softs->os_specific.pqi_buffer_dmat, 0, &rcbp->cm_datamap)) != 0) {
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DBG_ERR("Cant create datamap for buf @"
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"rcbp = %p maxio = %d error = %d\n",
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rcbp, softs->pqi_cap.max_outstanding_io, error);
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goto dma_out;
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}
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}
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os_start_heartbeat_timer((void *)softs); /* Start the heart-beat timer */
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callout_reset(&softs->os_specific.wellness_periodic, 120*hz,
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os_wellness_periodic, softs);
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/* Register our shutdown handler. */
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softs->os_specific.eh = EVENTHANDLER_REGISTER(shutdown_final,
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smartpqi_shutdown, softs, SHUTDOWN_PRI_DEFAULT);
|
|
|
|
error = pqisrc_scan_devices(softs);
|
|
if (error) {
|
|
DBG_ERR("Failed to scan lib error = %d\n", error);
|
|
error = PQI_STATUS_FAILURE;
|
|
goto out;
|
|
}
|
|
|
|
error = register_sim(softs, card_index);
|
|
if (error) {
|
|
DBG_ERR("Failed to register sim index = %d error = %d\n",
|
|
card_index, error);
|
|
goto out;
|
|
}
|
|
|
|
smartpqi_target_rescan(softs);
|
|
|
|
TASK_INIT(&softs->os_specific.event_task, 0, pqisrc_event_worker,softs);
|
|
|
|
error = create_char_dev(softs, card_index);
|
|
if (error) {
|
|
DBG_ERR("Failed to register character device index=%d r=%d\n",
|
|
card_index, error);
|
|
goto out;
|
|
}
|
|
goto out;
|
|
|
|
dma_out:
|
|
if (softs->os_specific.pqi_regs_res0 != NULL)
|
|
bus_release_resource(softs->os_specific.pqi_dev, SYS_RES_MEMORY,
|
|
softs->os_specific.pqi_regs_rid0,
|
|
softs->os_specific.pqi_regs_res0);
|
|
out:
|
|
DBG_FUNC("OUT error = %d\n", error);
|
|
return(error);
|
|
}
|
|
|
|
/*
|
|
* Deallocate resources for our device.
|
|
*/
|
|
static int
|
|
smartpqi_detach(device_t dev)
|
|
{
|
|
struct pqisrc_softstate *softs = NULL;
|
|
softs = device_get_softc(dev);
|
|
DBG_FUNC("IN\n");
|
|
|
|
EVENTHANDLER_DEREGISTER(shutdown_final, softs->os_specific.eh);
|
|
|
|
/* kill the periodic event */
|
|
callout_drain(&softs->os_specific.wellness_periodic);
|
|
/* Kill the heart beat event */
|
|
callout_drain(&softs->os_specific.heartbeat_timeout_id);
|
|
|
|
smartpqi_shutdown(softs);
|
|
destroy_char_dev(softs);
|
|
pqisrc_uninit(softs);
|
|
deregister_sim(softs);
|
|
pci_release_msi(dev);
|
|
|
|
DBG_FUNC("OUT\n");
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Bring the controller to a quiescent state, ready for system suspend.
|
|
*/
|
|
static int
|
|
smartpqi_suspend(device_t dev)
|
|
{
|
|
struct pqisrc_softstate *softs;
|
|
softs = device_get_softc(dev);
|
|
DBG_FUNC("IN\n");
|
|
|
|
DBG_INFO("Suspending the device %p\n", softs);
|
|
softs->os_specific.pqi_state |= SMART_STATE_SUSPEND;
|
|
|
|
DBG_FUNC("OUT\n");
|
|
return(0);
|
|
}
|
|
|
|
/*
|
|
* Bring the controller back to a state ready for operation.
|
|
*/
|
|
static int
|
|
smartpqi_resume(device_t dev)
|
|
{
|
|
struct pqisrc_softstate *softs;
|
|
softs = device_get_softc(dev);
|
|
DBG_FUNC("IN\n");
|
|
|
|
softs->os_specific.pqi_state &= ~SMART_STATE_SUSPEND;
|
|
|
|
DBG_FUNC("OUT\n");
|
|
return(0);
|
|
}
|
|
|
|
/*
|
|
* Do whatever is needed during a system shutdown.
|
|
*/
|
|
int
|
|
smartpqi_shutdown(void *arg)
|
|
{
|
|
struct pqisrc_softstate *softs = NULL;
|
|
int rval = 0;
|
|
|
|
DBG_FUNC("IN\n");
|
|
|
|
softs = (struct pqisrc_softstate *)arg;
|
|
|
|
rval = pqisrc_flush_cache(softs, PQISRC_SHUTDOWN);
|
|
if (rval != PQI_STATUS_SUCCESS) {
|
|
DBG_ERR("Unable to flush adapter cache! rval = %d", rval);
|
|
}
|
|
|
|
DBG_FUNC("OUT\n");
|
|
|
|
return rval;
|
|
}
|
|
|
|
/*
|
|
* PCI bus interface.
|
|
*/
|
|
static device_method_t pqi_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, smartpqi_probe),
|
|
DEVMETHOD(device_attach, smartpqi_attach),
|
|
DEVMETHOD(device_detach, smartpqi_detach),
|
|
DEVMETHOD(device_suspend, smartpqi_suspend),
|
|
DEVMETHOD(device_resume, smartpqi_resume),
|
|
{ 0, 0 }
|
|
};
|
|
|
|
static devclass_t pqi_devclass;
|
|
static driver_t smartpqi_pci_driver = {
|
|
"smartpqi",
|
|
pqi_methods,
|
|
sizeof(struct pqisrc_softstate)
|
|
};
|
|
|
|
DRIVER_MODULE(smartpqi, pci, smartpqi_pci_driver, pqi_devclass, 0, 0);
|
|
MODULE_DEPEND(smartpqi, pci, 1, 1, 1);
|