Wojciech Macek a134b98878 Add support for SPI-mapped MSI interrupts in GICv3. ... PIC_SETUP_INTR implementation in GICv3 did not allow for setting up interrupts without included FDT description. GICv2m-like MSI interrupts, which map MSI messages to SPI interrupt lines, may not have a description in FDT. Add support for such interrupts by setting the trigger and polarity to the appropriate values for MSI (edge, high) and get the hardware IRQ number from the corresponding ISRC. Obtained from: Semihalf Submitted by: Michal Stanek <mst@semihalf.com> Sponsored by: Annapurna Labs Reviewed by: wma Differential Revision: https://reviews.freebsd.org/D7662		2016-09-21 05:22:49 +00:00
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acpica	Add ARM64TODO comments to ACPI PCI stubs	2015-07-12 18:32:16 +00:00
arm64	Add support for SPI-mapped MSI interrupts in GICv3.	2016-09-21 05:22:49 +00:00
cavium	Remove the non-INTRNG support from the ThunderX PCIe drivers.	2016-07-14 17:23:49 +00:00
cloudabi64	Convert pointers obtained from the threadattr_t structure with TO_PTR().	2016-08-24 10:13:18 +00:00
conf	Add driver for PCIe root complex on Annapurna Alpine platform.	2016-09-20 11:11:06 +00:00
include	Fix the arm64 kernel build when DDB is disabled, debug_monitor.c depends on	2016-09-13 15:45:22 +00:00