6a05f063ed
Reviewed by: andrew, gonzo, Emmanuel Vadot <manu@bidouilliste.com> Approved by: gonzo (mentor) Differential Revision: https://reviews.freebsd.org/D5752
112 lines
3.5 KiB
Plaintext
112 lines
3.5 KiB
Plaintext
/*-
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* Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/ {
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clocks {
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pll3: clk@01c20010 {
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#clock-cells = <1>;
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compatible = "allwinner,sun4i-a10-pll3-clk";
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reg = <0x01c20010 0x4>;
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clock-output-names = "pll3-1x", "pll3-2x";
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};
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pll7: clk@01c20030 {
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#clock-cells = <1>;
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compatible = "allwinner,sun4i-a10-pll3-clk";
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reg = <0x01c20030 0x4>;
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clock-output-names = "pll7-1x", "pll7-2x";
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};
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hdmi_clk: clk@01c20150 {
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#clock-cells = <0>;
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compatible = "allwinner,sun4i-a10-hdmi-clk";
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reg = <0x01c20150 0x4>;
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clocks = <&pll3 0>, <&pll7 0>, <&pll3 1>, <&pll7 1>;
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clock-output-names = "hdmi";
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};
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lcd0_ch0_clk: clk@01c20118 {
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#clock-cells = <0>;
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#reset-cells = <0>;
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compatible = "allwinner,sun4i-a10-lcd-ch0-clk";
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reg = <0x01c20118 0x4>;
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clocks = <&pll3 0>, <&pll7 0>, <&pll3 1>, <&pll6 2>;
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clock-output-names = "lcd0_ch0";
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};
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lcd0_ch1_clk: clk@01c2012c {
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#clock-cells = <1>;
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compatible = "allwinner,sun4i-a10-lcd-ch1-clk";
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reg = <0x01c2012c 0x4>;
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clocks = <&pll3 0>, <&pll7 0>, <&pll3 1>, <&pll7 1>;
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clock-output-names = "lcd0_ch1_sclk1",
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"lcd0_ch1_sclk2";
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};
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de_be0_clk: clk@01c20104 {
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#clock-cells = <0>;
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#reset-cells = <0>;
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compatible = "allwinner,sun4i-a10-de-be-clk";
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reg = <0x01c20104 0x4>;
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clocks = <&pll3 0>, <&pll7 0>, <&pll5 1>;
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clock-output-names = "de_be0";
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};
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};
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soc@01c00000 {
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hdmi: hdmi@01c16000 {
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compatible = "allwinner,sun7i-a20-hdmi";
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reg = <0x01c16000 0x1000>;
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clocks = <&ahb_gates 43>, <&hdmi_clk>,
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<&lcd0_ch1_clk 1>;
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clock-names = "ahb", "hdmi",
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"lcd";
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status = "disabled";
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};
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hdmiaudio {
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compatible = "allwinner,sun7i-a20-hdmiaudio";
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status = "disabled";
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};
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fb: fb@01e60000 {
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compatible = "allwinner,sun7i-a20-fb";
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reg = <0x01e60000 0x10000>, /* DEBE0 */
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<0x01c0c000 0x1000>; /* LCD0 */
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clocks = <&ahb_gates 44>, <&dram_gates 26>,
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<&de_be0_clk>, <&ahb_gates 36>,
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<&lcd0_ch1_clk 0>, <&lcd0_ch1_clk 1>;
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clock-names = "ahb_de_be", "dram_de_be",
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"de_be", "ahb_lcd",
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"lcd_ch1_sclk1", "lcd_ch1_sclk2";
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resets = <&de_be0_clk>, <&lcd0_ch0_clk>;
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reset-names = "de_be", "lcd";
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};
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};
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};
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