Nathan Whitehorn a891d21aac Make sure the first instruction of the low-memory spinloop is in the ... cacheline being invalidated. MFC after: 1 month		2017-12-31 05:38:19 +00:00
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aim_machdep.c	Missed platform_smp_timebase_sync() in r326205.	2017-11-25 22:06:40 +00:00
locore32.S	Use the cookie now set by loader to determine whether the value passed to	2017-11-26 03:53:20 +00:00
locore64.S	Make sure the first instruction of the low-memory spinloop is in the	2017-12-31 05:38:19 +00:00
locore.S	Add a kdb show command to print arbitrary SPRs on PowerPC	2016-08-13 18:46:49 +00:00
mmu_oea64.c	sys/powerpc: further adoption of SPDX licensing ID tags.	2017-11-27 15:09:59 +00:00
mmu_oea64.h	sys/powerpc: further adoption of SPDX licensing ID tags.	2017-11-27 15:09:59 +00:00
mmu_oea.c	sys/powerpc: further adoption of SPDX licensing ID tags.	2017-11-27 15:09:59 +00:00
moea64_if.m	New pmap implementation for 64-bit PowerPC processors. The main focus of	2015-02-24 21:37:20 +00:00
moea64_native.c	sys/powerpc: further adoption of SPDX licensing ID tags.	2017-11-27 15:09:59 +00:00
mp_cpudep.c	sys/powerpc: further adoption of SPDX licensing ID tags.	2017-11-27 15:09:59 +00:00
slb.c	sys/powerpc: further adoption of SPDX licensing ID tags.	2017-11-27 15:09:59 +00:00
trap_subr32.S	Use the explicit expanded form of cmp.	2017-01-18 03:42:21 +00:00
trap_subr64.S	Maintain alignment of in-code 64-bit quantities by design rather than luck.	2017-12-29 20:25:15 +00:00