a1f8ad145e
applied to our copy of llvm/clang. These can be applied in alphabetical order to a pristine llvm/clang 3.4 release source tree, to result in the same version used in FreeBSD. This is intended to clearly document all the changes until now, which mostly consist of cherry pickings from the respective upstream trunks, plus a number of hand-written FreeBSD-specific ones. Hopefully those can eventually be cleaned up and sent upstream too. MFC after: 1 week X-MFC-With: r263313
134 lines
4.9 KiB
Diff
134 lines
4.9 KiB
Diff
Pull in r199014 from upstream llvm trunk (by Venkatraman Govindaraju):
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[Sparc] Bundle instruction with delay slow and its filler. Now, we can use -verify-machineinstrs with SPARC backend.
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Introduced here: http://svn.freebsd.org/changeset/base/262261
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Index: lib/Target/Sparc/DelaySlotFiller.cpp
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===================================================================
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--- lib/Target/Sparc/DelaySlotFiller.cpp
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+++ lib/Target/Sparc/DelaySlotFiller.cpp
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@@ -19,6 +19,7 @@
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#include "llvm/ADT/Statistic.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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+#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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@@ -55,6 +56,11 @@ namespace {
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bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
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bool runOnMachineFunction(MachineFunction &F) {
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bool Changed = false;
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+
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+ // This pass invalidates liveness information when it reorders
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+ // instructions to fill delay slot.
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+ F.getRegInfo().invalidateLiveness();
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+
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for (MachineFunction::iterator FI = F.begin(), FE = F.end();
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FI != FE; ++FI)
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Changed |= runOnMachineBasicBlock(*FI);
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@@ -61,9 +67,6 @@ namespace {
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return Changed;
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}
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- bool isDelayFiller(MachineBasicBlock &MBB,
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- MachineBasicBlock::iterator candidate);
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-
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void insertCallDefsUses(MachineBasicBlock::iterator MI,
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SmallSet<unsigned, 32>& RegDefs,
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SmallSet<unsigned, 32>& RegUses);
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@@ -152,6 +155,10 @@ bool Filler::runOnMachineBasicBlock(MachineBasicBl
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assert (J != MBB.end() && "MI needs a delay instruction.");
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BuildMI(MBB, ++J, MI->getDebugLoc(),
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TII->get(SP::UNIMP)).addImm(structSize);
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+ // Bundle the delay filler and unimp with the instruction.
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+ MIBundleBuilder(MBB, MachineBasicBlock::iterator(MI), J);
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+ } else {
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+ MIBundleBuilder(MBB, MachineBasicBlock::iterator(MI), I);
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}
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}
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return Changed;
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@@ -209,7 +216,7 @@ Filler::findDelayInstr(MachineBasicBlock &MBB,
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|| I->isInlineAsm()
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|| I->isLabel()
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|| I->hasDelaySlot()
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- || isDelayFiller(MBB, I))
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+ || I->isBundledWithSucc())
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break;
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if (delayHasHazard(I, sawLoad, sawStore, RegDefs, RegUses)) {
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@@ -332,18 +339,6 @@ bool Filler::IsRegInSet(SmallSet<unsigned, 32>& Re
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return false;
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}
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-// return true if the candidate is a delay filler.
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-bool Filler::isDelayFiller(MachineBasicBlock &MBB,
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- MachineBasicBlock::iterator candidate)
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-{
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- if (candidate == MBB.begin())
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- return false;
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- if (candidate->getOpcode() == SP::UNIMP)
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- return true;
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- --candidate;
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- return candidate->hasDelaySlot();
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-}
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-
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bool Filler::needsUnimp(MachineBasicBlock::iterator I, unsigned &StructSize)
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{
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if (!I->isCall())
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@@ -484,10 +479,10 @@ bool Filler::tryCombineRestoreWithPrevInst(Machine
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&& MBBI->getOperand(1).getReg() == SP::G0
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&& MBBI->getOperand(2).getReg() == SP::G0);
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- MachineBasicBlock::iterator PrevInst = MBBI; --PrevInst;
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+ MachineBasicBlock::iterator PrevInst = llvm::prior(MBBI);
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- // It cannot combine with a delay filler.
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- if (isDelayFiller(MBB, PrevInst))
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+ // It cannot be combined with a bundled instruction.
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+ if (PrevInst->isBundledWithSucc())
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return false;
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const TargetInstrInfo *TII = TM.getInstrInfo();
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Index: lib/Target/Sparc/SparcAsmPrinter.cpp
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===================================================================
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--- lib/Target/Sparc/SparcAsmPrinter.cpp
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+++ lib/Target/Sparc/SparcAsmPrinter.cpp
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@@ -184,7 +184,6 @@ static void LowerGETPCXAndEmitMCInsts(const Machin
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void SparcAsmPrinter::EmitInstruction(const MachineInstr *MI)
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{
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- MCInst TmpInst;
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switch (MI->getOpcode()) {
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default: break;
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@@ -195,8 +194,13 @@ void SparcAsmPrinter::EmitInstruction(const Machin
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LowerGETPCXAndEmitMCInsts(MI, OutStreamer, OutContext);
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return;
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}
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- LowerSparcMachineInstrToMCInst(MI, TmpInst, *this);
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- OutStreamer.EmitInstruction(TmpInst);
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+ MachineBasicBlock::const_instr_iterator I = MI;
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+ MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
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+ do {
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+ MCInst TmpInst;
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+ LowerSparcMachineInstrToMCInst(I, TmpInst, *this);
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+ OutStreamer.EmitInstruction(TmpInst);
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+ } while ((++I != E) && I->isInsideBundle()); // Delay slot check.
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}
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void SparcAsmPrinter::EmitFunctionBodyStart() {
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Index: test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
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===================================================================
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--- test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
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+++ test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
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@@ -1,5 +1,5 @@
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-;RUN: llc -march=sparc < %s | FileCheck %s
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-;RUN: llc -march=sparc -O0 < %s | FileCheck %s -check-prefix=UNOPT
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+;RUN: llc -march=sparc < %s -verify-machineinstrs | FileCheck %s
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+;RUN: llc -march=sparc -O0 < %s -verify-machineinstrs | FileCheck %s -check-prefix=UNOPT
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define i32 @test(i32 %a) nounwind {
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