641 lines
28 KiB
C
641 lines
28 KiB
C
/*-
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* Copyright (c) 2000 - 2008 Søren Schmidt <sos@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _SYS_ATA_H_
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#define _SYS_ATA_H_
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#include <sys/ioccom.h>
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/* ATA/ATAPI device parameters */
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struct ata_params {
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/*000*/ u_int16_t config; /* configuration info */
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#define ATA_PROTO_MASK 0x8003
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#define ATA_PROTO_ATAPI 0x8000
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#define ATA_PROTO_ATAPI_12 0x8000
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#define ATA_PROTO_ATAPI_16 0x8001
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#define ATA_PROTO_CFA 0x848a
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#define ATA_ATAPI_TYPE_MASK 0x1f00
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#define ATA_ATAPI_TYPE_DIRECT 0x0000 /* disk/floppy */
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#define ATA_ATAPI_TYPE_TAPE 0x0100 /* streaming tape */
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#define ATA_ATAPI_TYPE_CDROM 0x0500 /* CD-ROM device */
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#define ATA_ATAPI_TYPE_OPTICAL 0x0700 /* optical disk */
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#define ATA_DRQ_MASK 0x0060
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#define ATA_DRQ_SLOW 0x0000 /* cpu 3 ms delay */
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#define ATA_DRQ_INTR 0x0020 /* interrupt 10 ms delay */
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#define ATA_DRQ_FAST 0x0040 /* accel 50 us delay */
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#define ATA_RESP_INCOMPLETE 0x0004
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/*001*/ u_int16_t cylinders; /* # of cylinders */
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/*002*/ u_int16_t specconf; /* specific configuration */
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/*003*/ u_int16_t heads; /* # heads */
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u_int16_t obsolete4;
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u_int16_t obsolete5;
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/*006*/ u_int16_t sectors; /* # sectors/track */
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/*007*/ u_int16_t vendor7[3];
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/*010*/ u_int8_t serial[20]; /* serial number */
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/*020*/ u_int16_t retired20;
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u_int16_t retired21;
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u_int16_t obsolete22;
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/*023*/ u_int8_t revision[8]; /* firmware revision */
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/*027*/ u_int8_t model[40]; /* model name */
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/*047*/ u_int16_t sectors_intr; /* sectors per interrupt */
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/*048*/ u_int16_t usedmovsd; /* double word read/write? */
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/*049*/ u_int16_t capabilities1;
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#define ATA_SUPPORT_DMA 0x0100
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#define ATA_SUPPORT_LBA 0x0200
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#define ATA_SUPPORT_IORDY 0x0400
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#define ATA_SUPPORT_IORDYDIS 0x0800
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#define ATA_SUPPORT_OVERLAP 0x4000
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/*050*/ u_int16_t capabilities2;
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/*051*/ u_int16_t retired_piomode; /* PIO modes 0-2 */
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#define ATA_RETIRED_PIO_MASK 0x0300
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/*052*/ u_int16_t retired_dmamode; /* DMA modes */
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#define ATA_RETIRED_DMA_MASK 0x0003
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/*053*/ u_int16_t atavalid; /* fields valid */
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#define ATA_FLAG_54_58 0x0001 /* words 54-58 valid */
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#define ATA_FLAG_64_70 0x0002 /* words 64-70 valid */
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#define ATA_FLAG_88 0x0004 /* word 88 valid */
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/*054*/ u_int16_t current_cylinders;
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/*055*/ u_int16_t current_heads;
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/*056*/ u_int16_t current_sectors;
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/*057*/ u_int16_t current_size_1;
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/*058*/ u_int16_t current_size_2;
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/*059*/ u_int16_t multi;
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#define ATA_MULTI_VALID 0x0100
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/*060*/ u_int16_t lba_size_1;
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u_int16_t lba_size_2;
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u_int16_t obsolete62;
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/*063*/ u_int16_t mwdmamodes; /* multiword DMA modes */
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/*064*/ u_int16_t apiomodes; /* advanced PIO modes */
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/*065*/ u_int16_t mwdmamin; /* min. M/W DMA time/word ns */
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/*066*/ u_int16_t mwdmarec; /* rec. M/W DMA time ns */
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/*067*/ u_int16_t pioblind; /* min. PIO cycle w/o flow */
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/*068*/ u_int16_t pioiordy; /* min. PIO cycle IORDY flow */
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/*069*/ u_int16_t support3;
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#define ATA_SUPPORT_RZAT 0x0020
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#define ATA_SUPPORT_DRAT 0x4000
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u_int16_t reserved70;
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/*071*/ u_int16_t rlsovlap; /* rel time (us) for overlap */
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/*072*/ u_int16_t rlsservice; /* rel time (us) for service */
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u_int16_t reserved73;
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u_int16_t reserved74;
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/*075*/ u_int16_t queue;
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#define ATA_QUEUE_LEN(x) ((x) & 0x001f)
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/*76*/ u_int16_t satacapabilities;
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#define ATA_SATA_GEN1 0x0002
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#define ATA_SATA_GEN2 0x0004
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#define ATA_SATA_GEN3 0x0008
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#define ATA_SUPPORT_NCQ 0x0100
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#define ATA_SUPPORT_IFPWRMNGTRCV 0x0200
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#define ATA_SUPPORT_PHYEVENTCNT 0x0400
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#define ATA_SUPPORT_NCQ_UNLOAD 0x0800
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#define ATA_SUPPORT_NCQ_PRIO 0x1000
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#define ATA_SUPPORT_HAPST 0x2000
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#define ATA_SUPPORT_DAPST 0x4000
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#define ATA_SUPPORT_READLOGDMAEXT 0x8000
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/*77*/ u_int16_t satacapabilities2;
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#define ATA_SATA_CURR_GEN_MASK 0x0006
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#define ATA_SUPPORT_NCQ_STREAM 0x0010
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#define ATA_SUPPORT_NCQ_QMANAGEMENT 0x0020
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#define ATA_SUPPORT_RCVSND_FPDMA_QUEUED 0x0040
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/*78*/ u_int16_t satasupport;
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#define ATA_SUPPORT_NONZERO 0x0002
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#define ATA_SUPPORT_AUTOACTIVATE 0x0004
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#define ATA_SUPPORT_IFPWRMNGT 0x0008
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#define ATA_SUPPORT_INORDERDATA 0x0010
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#define ATA_SUPPORT_ASYNCNOTIF 0x0020
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#define ATA_SUPPORT_SOFTSETPRESERVE 0x0040
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/*79*/ u_int16_t sataenabled;
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#define ATA_ENABLED_DAPST 0x0080
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/*080*/ u_int16_t version_major;
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/*081*/ u_int16_t version_minor;
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struct {
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/*082/085*/ u_int16_t command1;
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#define ATA_SUPPORT_SMART 0x0001
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#define ATA_SUPPORT_SECURITY 0x0002
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#define ATA_SUPPORT_REMOVABLE 0x0004
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#define ATA_SUPPORT_POWERMGT 0x0008
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#define ATA_SUPPORT_PACKET 0x0010
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#define ATA_SUPPORT_WRITECACHE 0x0020
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#define ATA_SUPPORT_LOOKAHEAD 0x0040
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#define ATA_SUPPORT_RELEASEIRQ 0x0080
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#define ATA_SUPPORT_SERVICEIRQ 0x0100
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#define ATA_SUPPORT_RESET 0x0200
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#define ATA_SUPPORT_PROTECTED 0x0400
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#define ATA_SUPPORT_WRITEBUFFER 0x1000
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#define ATA_SUPPORT_READBUFFER 0x2000
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#define ATA_SUPPORT_NOP 0x4000
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/*083/086*/ u_int16_t command2;
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#define ATA_SUPPORT_MICROCODE 0x0001
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#define ATA_SUPPORT_QUEUED 0x0002
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#define ATA_SUPPORT_CFA 0x0004
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#define ATA_SUPPORT_APM 0x0008
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#define ATA_SUPPORT_NOTIFY 0x0010
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#define ATA_SUPPORT_STANDBY 0x0020
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#define ATA_SUPPORT_SPINUP 0x0040
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#define ATA_SUPPORT_MAXSECURITY 0x0100
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#define ATA_SUPPORT_AUTOACOUSTIC 0x0200
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#define ATA_SUPPORT_ADDRESS48 0x0400
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#define ATA_SUPPORT_OVERLAY 0x0800
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#define ATA_SUPPORT_FLUSHCACHE 0x1000
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#define ATA_SUPPORT_FLUSHCACHE48 0x2000
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/*084/087*/ u_int16_t extension;
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#define ATA_SUPPORT_SMARTLOG 0x0001
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#define ATA_SUPPORT_SMARTTEST 0x0002
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#define ATA_SUPPORT_MEDIASN 0x0004
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#define ATA_SUPPORT_MEDIAPASS 0x0008
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#define ATA_SUPPORT_STREAMING 0x0010
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#define ATA_SUPPORT_GENLOG 0x0020
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#define ATA_SUPPORT_WRITEDMAFUAEXT 0x0040
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#define ATA_SUPPORT_WRITEDMAQFUAEXT 0x0080
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#define ATA_SUPPORT_64BITWWN 0x0100
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#define ATA_SUPPORT_UNLOAD 0x2000
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} __packed support, enabled;
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/*088*/ u_int16_t udmamodes; /* UltraDMA modes */
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/*089*/ u_int16_t erase_time; /* time req'd in 2min units */
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/*090*/ u_int16_t enhanced_erase_time; /* time req'd in 2min units */
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/*091*/ u_int16_t apm_value;
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/*092*/ u_int16_t master_passwd_revision; /* password revision code */
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/*093*/ u_int16_t hwres;
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#define ATA_CABLE_ID 0x2000
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/*094*/ u_int16_t acoustic;
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#define ATA_ACOUSTIC_CURRENT(x) ((x) & 0x00ff)
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#define ATA_ACOUSTIC_VENDOR(x) (((x) & 0xff00) >> 8)
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/*095*/ u_int16_t stream_min_req_size;
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/*096*/ u_int16_t stream_transfer_time;
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/*097*/ u_int16_t stream_access_latency;
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/*098*/ u_int32_t stream_granularity;
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/*100*/ u_int16_t lba_size48_1;
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u_int16_t lba_size48_2;
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u_int16_t lba_size48_3;
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u_int16_t lba_size48_4;
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u_int16_t reserved104;
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/*105*/ u_int16_t max_dsm_blocks;
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/*106*/ u_int16_t pss;
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#define ATA_PSS_LSPPS 0x000F
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#define ATA_PSS_LSSABOVE512 0x1000
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#define ATA_PSS_MULTLS 0x2000
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#define ATA_PSS_VALID_MASK 0xC000
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#define ATA_PSS_VALID_VALUE 0x4000
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/*107*/ u_int16_t isd;
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/*108*/ u_int16_t wwn[4];
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u_int16_t reserved112[5];
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/*117*/ u_int16_t lss_1;
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/*118*/ u_int16_t lss_2;
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/*119*/ u_int16_t support2;
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#define ATA_SUPPORT_WRITEREADVERIFY 0x0002
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#define ATA_SUPPORT_WRITEUNCORREXT 0x0004
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#define ATA_SUPPORT_RWLOGDMAEXT 0x0008
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#define ATA_SUPPORT_MICROCODE3 0x0010
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#define ATA_SUPPORT_FREEFALL 0x0020
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/*120*/ u_int16_t enabled2;
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u_int16_t reserved121[6];
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/*127*/ u_int16_t removable_status;
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/*128*/ u_int16_t security_status;
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#define ATA_SECURITY_LEVEL 0x0100 /* 0: high, 1: maximum */
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#define ATA_SECURITY_ENH_SUPP 0x0020 /* enhanced erase supported */
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#define ATA_SECURITY_COUNT_EXP 0x0010 /* count expired */
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#define ATA_SECURITY_FROZEN 0x0008 /* security config is frozen */
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#define ATA_SECURITY_LOCKED 0x0004 /* drive is locked */
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#define ATA_SECURITY_ENABLED 0x0002 /* ATA Security is enabled */
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#define ATA_SECURITY_SUPPORTED 0x0001 /* ATA Security is supported */
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u_int16_t reserved129[31];
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/*160*/ u_int16_t cfa_powermode1;
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u_int16_t reserved161;
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/*162*/ u_int16_t cfa_kms_support;
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/*163*/ u_int16_t cfa_trueide_modes;
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/*164*/ u_int16_t cfa_memory_modes;
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u_int16_t reserved165[4];
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/*169*/ u_int16_t support_dsm;
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#define ATA_SUPPORT_DSM_TRIM 0x0001
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u_int16_t reserved170[6];
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/*176*/ u_int8_t media_serial[60];
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/*206*/ u_int16_t sct;
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u_int16_t reserved206[2];
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/*209*/ u_int16_t lsalign;
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/*210*/ u_int16_t wrv_sectors_m3_1;
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u_int16_t wrv_sectors_m3_2;
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/*212*/ u_int16_t wrv_sectors_m2_1;
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u_int16_t wrv_sectors_m2_2;
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/*214*/ u_int16_t nv_cache_caps;
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/*215*/ u_int16_t nv_cache_size_1;
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u_int16_t nv_cache_size_2;
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/*217*/ u_int16_t media_rotation_rate;
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#define ATA_RATE_NOT_REPORTED 0x0000
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#define ATA_RATE_NON_ROTATING 0x0001
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u_int16_t reserved218;
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/*219*/ u_int16_t nv_cache_opt;
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/*220*/ u_int16_t wrv_mode;
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u_int16_t reserved221;
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/*222*/ u_int16_t transport_major;
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/*223*/ u_int16_t transport_minor;
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u_int16_t reserved224[31];
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/*255*/ u_int16_t integrity;
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} __packed;
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/* ATA Dataset Management */
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#define ATA_DSM_BLK_SIZE 512
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#define ATA_DSM_BLK_RANGES 64
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#define ATA_DSM_RANGE_SIZE 8
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#define ATA_DSM_RANGE_MAX 65535
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/*
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* ATA Device Register
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*
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* bit 7 Obsolete (was 1 in early ATA specs)
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* bit 6 Sets LBA/CHS mode. 1=LBA, 0=CHS
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* bit 5 Obsolete (was 1 in early ATA specs)
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* bit 4 1 = Slave Drive, 0 = Master Drive
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* bit 3-0 In LBA mode, 27-24 of address. In CHS mode, head number
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*/
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#define ATA_DEV_MASTER 0x00
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#define ATA_DEV_SLAVE 0x10
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#define ATA_DEV_LBA 0x40
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/* ATA limits */
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#define ATA_MAX_28BIT_LBA 268435455UL
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/* ATA Status Register */
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#define ATA_STATUS_ERROR 0x01
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#define ATA_STATUS_DEVICE_FAULT 0x20
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/* ATA Error Register */
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#define ATA_ERROR_ABORT 0x04
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#define ATA_ERROR_ID_NOT_FOUND 0x10
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/* ATA HPA Features */
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#define ATA_HPA_FEAT_MAX_ADDR 0x00
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#define ATA_HPA_FEAT_SET_PWD 0x01
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#define ATA_HPA_FEAT_LOCK 0x02
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#define ATA_HPA_FEAT_UNLOCK 0x03
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#define ATA_HPA_FEAT_FREEZE 0x04
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/* ATA transfer modes */
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#define ATA_MODE_MASK 0x0f
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#define ATA_DMA_MASK 0xf0
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#define ATA_PIO 0x00
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#define ATA_PIO0 0x08
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#define ATA_PIO1 0x09
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#define ATA_PIO2 0x0a
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#define ATA_PIO3 0x0b
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#define ATA_PIO4 0x0c
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#define ATA_PIO_MAX 0x0f
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#define ATA_DMA 0x10
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#define ATA_WDMA0 0x20
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#define ATA_WDMA1 0x21
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#define ATA_WDMA2 0x22
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#define ATA_UDMA0 0x40
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#define ATA_UDMA1 0x41
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#define ATA_UDMA2 0x42
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#define ATA_UDMA3 0x43
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#define ATA_UDMA4 0x44
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#define ATA_UDMA5 0x45
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#define ATA_UDMA6 0x46
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#define ATA_SA150 0x47
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#define ATA_SA300 0x48
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#define ATA_DMA_MAX 0x4f
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/* ATA commands */
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#define ATA_NOP 0x00 /* NOP */
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#define ATA_NF_FLUSHQUEUE 0x00 /* flush queued cmd's */
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#define ATA_NF_AUTOPOLL 0x01 /* start autopoll function */
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#define ATA_DATA_SET_MANAGEMENT 0x06
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#define ATA_DSM_TRIM 0x01
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#define ATA_DEVICE_RESET 0x08 /* reset device */
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#define ATA_READ 0x20 /* read */
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#define ATA_READ48 0x24 /* read 48bit LBA */
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#define ATA_READ_DMA48 0x25 /* read DMA 48bit LBA */
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#define ATA_READ_DMA_QUEUED48 0x26 /* read DMA QUEUED 48bit LBA */
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#define ATA_READ_NATIVE_MAX_ADDRESS48 0x27 /* read native max addr 48bit */
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#define ATA_READ_MUL48 0x29 /* read multi 48bit LBA */
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#define ATA_READ_STREAM_DMA48 0x2a /* read DMA stream 48bit LBA */
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#define ATA_READ_LOG_EXT 0x2f /* read log ext - PIO Data-In */
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#define ATA_READ_STREAM48 0x2b /* read stream 48bit LBA */
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#define ATA_WRITE 0x30 /* write */
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#define ATA_WRITE48 0x34 /* write 48bit LBA */
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#define ATA_WRITE_DMA48 0x35 /* write DMA 48bit LBA */
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#define ATA_WRITE_DMA_QUEUED48 0x36 /* write DMA QUEUED 48bit LBA*/
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#define ATA_SET_MAX_ADDRESS48 0x37 /* set max address 48bit */
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#define ATA_WRITE_MUL48 0x39 /* write multi 48bit LBA */
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#define ATA_WRITE_STREAM_DMA48 0x3a
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#define ATA_WRITE_STREAM48 0x3b
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#define ATA_WRITE_DMA_FUA48 0x3d
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#define ATA_WRITE_DMA_QUEUED_FUA48 0x3e
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#define ATA_WRITE_LOG_EXT 0x3f
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#define ATA_READ_VERIFY 0x40
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#define ATA_READ_VERIFY48 0x42
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#define ATA_READ_LOG_DMA_EXT 0x47 /* read log DMA ext - PIO Data-In */
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#define ATA_READ_FPDMA_QUEUED 0x60 /* read DMA NCQ */
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#define ATA_WRITE_FPDMA_QUEUED 0x61 /* write DMA NCQ */
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#define ATA_NCQ_NON_DATA 0x63 /* NCQ non-data command */
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#define ATA_SEND_FPDMA_QUEUED 0x64 /* send DMA NCQ */
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#define ATA_SFPDMA_DSM 0x00 /* Data set management */
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#define ATA_SFPDMA_DSM_TRIM 0x01 /* Set trim bit in auxilary */
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#define ATA_SFPDMA_HYBRID_EVICT 0x01 /* Hybrid Evict */
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#define ATA_SFPDMA_WLDMA 0x02 /* Write Log DMA EXT */
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#define ATA_RECV_FPDMA_QUEUED 0x65 /* recieve DMA NCQ */
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#define ATA_SEP_ATTN 0x67 /* SEP request */
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#define ATA_SEEK 0x70 /* seek */
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#define ATA_PACKET_CMD 0xa0 /* packet command */
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#define ATA_ATAPI_IDENTIFY 0xa1 /* get ATAPI params*/
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#define ATA_SERVICE 0xa2 /* service command */
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#define ATA_SMART_CMD 0xb0 /* SMART command */
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#define ATA_CFA_ERASE 0xc0 /* CFA erase */
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#define ATA_READ_MUL 0xc4 /* read multi */
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#define ATA_WRITE_MUL 0xc5 /* write multi */
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#define ATA_SET_MULTI 0xc6 /* set multi size */
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#define ATA_READ_DMA_QUEUED 0xc7 /* read DMA QUEUED */
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#define ATA_READ_DMA 0xc8 /* read DMA */
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#define ATA_WRITE_DMA 0xca /* write DMA */
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#define ATA_WRITE_DMA_QUEUED 0xcc /* write DMA QUEUED */
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#define ATA_WRITE_MUL_FUA48 0xce
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#define ATA_STANDBY_IMMEDIATE 0xe0 /* standby immediate */
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#define ATA_IDLE_IMMEDIATE 0xe1 /* idle immediate */
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#define ATA_STANDBY_CMD 0xe2 /* standby */
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#define ATA_IDLE_CMD 0xe3 /* idle */
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#define ATA_READ_BUFFER 0xe4 /* read buffer */
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#define ATA_READ_PM 0xe4 /* read portmultiplier */
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#define ATA_SLEEP 0xe6 /* sleep */
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#define ATA_FLUSHCACHE 0xe7 /* flush cache to disk */
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#define ATA_WRITE_PM 0xe8 /* write portmultiplier */
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#define ATA_FLUSHCACHE48 0xea /* flush cache to disk */
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#define ATA_ATA_IDENTIFY 0xec /* get ATA params */
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#define ATA_SETFEATURES 0xef /* features command */
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#define ATA_SF_SETXFER 0x03 /* set transfer mode */
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#define ATA_SF_ENAB_WCACHE 0x02 /* enable write cache */
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#define ATA_SF_DIS_WCACHE 0x82 /* disable write cache */
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#define ATA_SF_ENAB_PUIS 0x06 /* enable PUIS */
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#define ATA_SF_DIS_PUIS 0x86 /* disable PUIS */
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#define ATA_SF_PUIS_SPINUP 0x07 /* PUIS spin-up */
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#define ATA_SF_ENAB_RCACHE 0xaa /* enable readahead cache */
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#define ATA_SF_DIS_RCACHE 0x55 /* disable readahead cache */
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#define ATA_SF_ENAB_RELIRQ 0x5d /* enable release interrupt */
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#define ATA_SF_DIS_RELIRQ 0xdd /* disable release interrupt */
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#define ATA_SF_ENAB_SRVIRQ 0x5e /* enable service interrupt */
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#define ATA_SF_DIS_SRVIRQ 0xde /* disable service interrupt */
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#define ATA_SECURITY_SET_PASSWORD 0xf1 /* set drive password */
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#define ATA_SECURITY_UNLOCK 0xf2 /* unlock drive using passwd */
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#define ATA_SECURITY_ERASE_PREPARE 0xf3 /* prepare to erase drive */
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#define ATA_SECURITY_ERASE_UNIT 0xf4 /* erase all blocks on drive */
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#define ATA_SECURITY_FREEZE_LOCK 0xf5 /* freeze security config */
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#define ATA_SECURITY_DISABLE_PASSWORD 0xf6 /* disable drive password */
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#define ATA_READ_NATIVE_MAX_ADDRESS 0xf8 /* read native max address */
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#define ATA_SET_MAX_ADDRESS 0xf9 /* set max address */
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/* ATAPI commands */
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#define ATAPI_TEST_UNIT_READY 0x00 /* check if device is ready */
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#define ATAPI_REZERO 0x01 /* rewind */
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#define ATAPI_REQUEST_SENSE 0x03 /* get sense data */
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#define ATAPI_FORMAT 0x04 /* format unit */
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#define ATAPI_READ 0x08 /* read data */
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#define ATAPI_WRITE 0x0a /* write data */
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#define ATAPI_WEOF 0x10 /* write filemark */
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#define ATAPI_WF_WRITE 0x01
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#define ATAPI_SPACE 0x11 /* space command */
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#define ATAPI_SP_FM 0x01
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#define ATAPI_SP_EOD 0x03
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#define ATAPI_INQUIRY 0x12 /* get inquiry data */
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#define ATAPI_MODE_SELECT 0x15 /* mode select */
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#define ATAPI_ERASE 0x19 /* erase */
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#define ATAPI_MODE_SENSE 0x1a /* mode sense */
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#define ATAPI_START_STOP 0x1b /* start/stop unit */
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#define ATAPI_SS_LOAD 0x01
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#define ATAPI_SS_RETENSION 0x02
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#define ATAPI_SS_EJECT 0x04
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#define ATAPI_PREVENT_ALLOW 0x1e /* media removal */
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#define ATAPI_READ_FORMAT_CAPACITIES 0x23 /* get format capacities */
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#define ATAPI_READ_CAPACITY 0x25 /* get volume capacity */
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#define ATAPI_READ_BIG 0x28 /* read data */
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#define ATAPI_WRITE_BIG 0x2a /* write data */
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#define ATAPI_LOCATE 0x2b /* locate to position */
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#define ATAPI_READ_POSITION 0x34 /* read position */
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#define ATAPI_SYNCHRONIZE_CACHE 0x35 /* flush buf, close channel */
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#define ATAPI_WRITE_BUFFER 0x3b /* write device buffer */
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#define ATAPI_READ_BUFFER 0x3c /* read device buffer */
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#define ATAPI_READ_SUBCHANNEL 0x42 /* get subchannel info */
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#define ATAPI_READ_TOC 0x43 /* get table of contents */
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#define ATAPI_PLAY_10 0x45 /* play by lba */
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#define ATAPI_PLAY_MSF 0x47 /* play by MSF address */
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#define ATAPI_PLAY_TRACK 0x48 /* play by track number */
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#define ATAPI_PAUSE 0x4b /* pause audio operation */
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#define ATAPI_READ_DISK_INFO 0x51 /* get disk info structure */
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#define ATAPI_READ_TRACK_INFO 0x52 /* get track info structure */
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#define ATAPI_RESERVE_TRACK 0x53 /* reserve track */
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#define ATAPI_SEND_OPC_INFO 0x54 /* send OPC structurek */
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#define ATAPI_MODE_SELECT_BIG 0x55 /* set device parameters */
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#define ATAPI_REPAIR_TRACK 0x58 /* repair track */
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#define ATAPI_READ_MASTER_CUE 0x59 /* read master CUE info */
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#define ATAPI_MODE_SENSE_BIG 0x5a /* get device parameters */
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#define ATAPI_CLOSE_TRACK 0x5b /* close track/session */
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#define ATAPI_READ_BUFFER_CAPACITY 0x5c /* get buffer capicity */
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#define ATAPI_SEND_CUE_SHEET 0x5d /* send CUE sheet */
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#define ATAPI_SERVICE_ACTION_IN 0x96 /* get service data */
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#define ATAPI_BLANK 0xa1 /* blank the media */
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#define ATAPI_SEND_KEY 0xa3 /* send DVD key structure */
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#define ATAPI_REPORT_KEY 0xa4 /* get DVD key structure */
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#define ATAPI_PLAY_12 0xa5 /* play by lba */
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#define ATAPI_LOAD_UNLOAD 0xa6 /* changer control command */
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#define ATAPI_READ_STRUCTURE 0xad /* get DVD structure */
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#define ATAPI_PLAY_CD 0xb4 /* universal play command */
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#define ATAPI_SET_SPEED 0xbb /* set drive speed */
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#define ATAPI_MECH_STATUS 0xbd /* get changer status */
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#define ATAPI_READ_CD 0xbe /* read data */
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#define ATAPI_POLL_DSC 0xff /* poll DSC status bit */
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struct ata_ioc_devices {
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int channel;
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char name[2][32];
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struct ata_params params[2];
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};
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/* pr channel ATA ioctl calls */
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#define IOCATAGMAXCHANNEL _IOR('a', 1, int)
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#define IOCATAREINIT _IOW('a', 2, int)
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#define IOCATAATTACH _IOW('a', 3, int)
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#define IOCATADETACH _IOW('a', 4, int)
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#define IOCATADEVICES _IOWR('a', 5, struct ata_ioc_devices)
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|
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/* ATAPI request sense structure */
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struct atapi_sense {
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u_int8_t error; /* current or deferred errors */
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#define ATA_SENSE_VALID 0x80
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|
|
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u_int8_t segment; /* segment number */
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|
u_int8_t key; /* sense key */
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#define ATA_SENSE_KEY_MASK 0x0f /* sense key mask */
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#define ATA_SENSE_NO_SENSE 0x00 /* no specific sense key info */
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#define ATA_SENSE_RECOVERED_ERROR 0x01 /* command OK, data recovered */
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#define ATA_SENSE_NOT_READY 0x02 /* no access to drive */
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#define ATA_SENSE_MEDIUM_ERROR 0x03 /* non-recovered data error */
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|
#define ATA_SENSE_HARDWARE_ERROR 0x04 /* non-recoverable HW failure */
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#define ATA_SENSE_ILLEGAL_REQUEST 0x05 /* invalid command param(s) */
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|
#define ATA_SENSE_UNIT_ATTENTION 0x06 /* media changed */
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|
#define ATA_SENSE_DATA_PROTECT 0x07 /* write protect */
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|
#define ATA_SENSE_BLANK_CHECK 0x08 /* blank check */
|
|
#define ATA_SENSE_VENDOR_SPECIFIC 0x09 /* vendor specific skey */
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|
#define ATA_SENSE_COPY_ABORTED 0x0a /* copy aborted */
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|
#define ATA_SENSE_ABORTED_COMMAND 0x0b /* command aborted, try again */
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|
#define ATA_SENSE_EQUAL 0x0c /* equal */
|
|
#define ATA_SENSE_VOLUME_OVERFLOW 0x0d /* volume overflow */
|
|
#define ATA_SENSE_MISCOMPARE 0x0e /* data dont match the medium */
|
|
#define ATA_SENSE_RESERVED 0x0f
|
|
#define ATA_SENSE_ILI 0x20;
|
|
#define ATA_SENSE_EOM 0x40;
|
|
#define ATA_SENSE_FILEMARK 0x80;
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|
|
|
u_int32_t cmd_info; /* cmd information */
|
|
u_int8_t sense_length; /* additional sense len (n-7) */
|
|
u_int32_t cmd_specific_info; /* additional cmd spec info */
|
|
u_int8_t asc; /* additional sense code */
|
|
u_int8_t ascq; /* additional sense code qual */
|
|
u_int8_t replaceable_unit_code; /* replaceable unit code */
|
|
u_int8_t specific; /* sense key specific */
|
|
#define ATA_SENSE_SPEC_VALID 0x80
|
|
#define ATA_SENSE_SPEC_MASK 0x7f
|
|
|
|
u_int8_t specific1; /* sense key specific */
|
|
u_int8_t specific2; /* sense key specific */
|
|
} __packed;
|
|
|
|
struct ata_ioc_request {
|
|
union {
|
|
struct {
|
|
u_int8_t command;
|
|
u_int8_t feature;
|
|
u_int64_t lba;
|
|
u_int16_t count;
|
|
} ata;
|
|
struct {
|
|
char ccb[16];
|
|
struct atapi_sense sense;
|
|
} atapi;
|
|
} u;
|
|
caddr_t data;
|
|
int count;
|
|
int flags;
|
|
#define ATA_CMD_CONTROL 0x01
|
|
#define ATA_CMD_READ 0x02
|
|
#define ATA_CMD_WRITE 0x04
|
|
#define ATA_CMD_ATAPI 0x08
|
|
|
|
int timeout;
|
|
int error;
|
|
};
|
|
|
|
struct ata_security_password {
|
|
u_int16_t ctrl;
|
|
#define ATA_SECURITY_PASSWORD_USER 0x0000
|
|
#define ATA_SECURITY_PASSWORD_MASTER 0x0001
|
|
#define ATA_SECURITY_ERASE_NORMAL 0x0000
|
|
#define ATA_SECURITY_ERASE_ENHANCED 0x0002
|
|
#define ATA_SECURITY_LEVEL_HIGH 0x0000
|
|
#define ATA_SECURITY_LEVEL_MAXIMUM 0x0100
|
|
|
|
u_int8_t password[32];
|
|
u_int16_t revision;
|
|
u_int16_t reserved[238];
|
|
};
|
|
|
|
/* pr device ATA ioctl calls */
|
|
#define IOCATAREQUEST _IOWR('a', 100, struct ata_ioc_request)
|
|
#define IOCATAGPARM _IOR('a', 101, struct ata_params)
|
|
#define IOCATAGMODE _IOR('a', 102, int)
|
|
#define IOCATASMODE _IOW('a', 103, int)
|
|
|
|
#define IOCATAGSPINDOWN _IOR('a', 104, int)
|
|
#define IOCATASSPINDOWN _IOW('a', 105, int)
|
|
|
|
|
|
struct ata_ioc_raid_config {
|
|
int lun;
|
|
int type;
|
|
#define AR_JBOD 0x0001
|
|
#define AR_SPAN 0x0002
|
|
#define AR_RAID0 0x0004
|
|
#define AR_RAID1 0x0008
|
|
#define AR_RAID01 0x0010
|
|
#define AR_RAID3 0x0020
|
|
#define AR_RAID4 0x0040
|
|
#define AR_RAID5 0x0080
|
|
|
|
int interleave;
|
|
int status;
|
|
#define AR_READY 1
|
|
#define AR_DEGRADED 2
|
|
#define AR_REBUILDING 4
|
|
|
|
int progress;
|
|
int total_disks;
|
|
int disks[16];
|
|
};
|
|
|
|
struct ata_ioc_raid_status {
|
|
int lun;
|
|
int type;
|
|
int interleave;
|
|
int status;
|
|
int progress;
|
|
int total_disks;
|
|
struct {
|
|
int state;
|
|
#define AR_DISK_ONLINE 0x01
|
|
#define AR_DISK_PRESENT 0x02
|
|
#define AR_DISK_SPARE 0x04
|
|
int lun;
|
|
} disks[16];
|
|
};
|
|
|
|
/* ATA RAID ioctl calls */
|
|
#define IOCATARAIDCREATE _IOWR('a', 200, struct ata_ioc_raid_config)
|
|
#define IOCATARAIDDELETE _IOW('a', 201, int)
|
|
#define IOCATARAIDSTATUS _IOWR('a', 202, struct ata_ioc_raid_status)
|
|
#define IOCATARAIDADDSPARE _IOW('a', 203, struct ata_ioc_raid_config)
|
|
#define IOCATARAIDREBUILD _IOW('a', 204, int)
|
|
|
|
#endif /* _SYS_ATA_H_ */
|