a3b33372b9
doesn't have to calculate it every call. Rename `timer0_prescale' to `timer0_prescaler_count' and maintain it correctly. Previously we lost a few 8253 cycles for every "prescaled" clock interrupt, and the lossage grows rapidly at 16 KHz. Now we only lose a few cycles for every standard clock interrupt. Rename `*_divisor' to `*_max_count'. Do the calculation of TIMER_DIV(rate) only once instead of 3 times each time the rate is changed. Don't allow preposterously large interrupt rates. Bug fixes elsewhere should allow the system to survive rates that saturate the system, however. Clean up declarations. Include <machine/clock.h> to check our own declarations. |
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clock.c | ||
icu.h | ||
isa.c | ||
isa.h | ||
npx.c | ||
timerreg.h | ||
vector.s | ||
vector.S |