d1b40f007d
Remove all the stuff that does not relate to the TSC.
Change the calibration to use DELAY(1000000) rather than trying to check
it against the CMOS RTC, this drastically increases precision:
Using 25 samples on a Athlon 700MHz UP machine I find:
stddev min max average
CMOS 22200 Hz -74980 Hz 34301 Hz 704928721 Hz
DELAY 1805 Hz -1984 Hz 2678 Hz 704937583 Hz
(The difference between the two averages is not statistically significant.)
expressed in PPM of the frequency:
stddev min max
CMOS 31.49 PPM -106.37 PPM 48.66 PPM
DELAY 2.56 PPM 2.81 PPM 3.80 PPM
This code will not be used until a followup commit to sys/isa/clock.c
and sys/pc98/pc98/clock.c which will only happen after some field testing.
53 lines
1.1 KiB
C
53 lines
1.1 KiB
C
/*
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* Kernel interface to machine-dependent clock driver.
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* Garrett Wollman, September 1994.
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* This file is in the public domain.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_CLOCK_H_
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#define _MACHINE_CLOCK_H_
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#ifdef _KERNEL
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/*
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* i386 to clock driver interface.
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* XXX large parts of the driver and its interface are misplaced.
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*/
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extern int adjkerntz;
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extern int disable_rtc_set;
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extern int pscnt;
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extern int psdiv;
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extern int statclock_disable;
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extern u_int timer_freq;
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extern int timer0_max_count;
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extern uint64_t tsc_freq;
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extern int tsc_is_broken;
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extern int wall_cmos_clock;
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#ifdef APIC_IO
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extern int apic_8254_intr;
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#endif
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/*
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* Driver to clock driver interface.
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*/
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struct clockframe;
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int acquire_timer0(int rate, void (*function)(struct clockframe *frame));
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int acquire_timer2(int mode);
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int release_timer0(void);
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int release_timer2(void);
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#ifndef PC98
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int rtcin(int val);
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#else
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int acquire_timer1(int mode);
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int release_timer1(void);
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#endif
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int sysbeep(int pitch, int period);
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void timer_restore(void);
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void init_TSC(void);
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#endif /* _KERNEL */
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#endif /* !_MACHINE_CLOCK_H_ */
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