08d3edb315
old or previous value instead of void. This is not as is documented in atomic(9), but is API (and ABI) compatible and simply makes sense. This feature will primarily be used for atomic PTE updates in PMAP/ng.
385 lines
12 KiB
C
385 lines
12 KiB
C
/*-
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* Copyright (c) 1998 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_ATOMIC_H_
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#define _MACHINE_ATOMIC_H_
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/*
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* Various simple arithmetic on memory which is atomic in the presence
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* of interrupts and SMP safe.
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*/
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/*
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* Everything is built out of cmpxchg.
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*/
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#define IA64_CMPXCHG(sz, sem, p, cmpval, newval, ret) \
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__asm __volatile ( \
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"mov ar.ccv=%2;;\n\t" \
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"cmpxchg" #sz "." #sem " %0=%4,%3,ar.ccv\n\t" \
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: "=r" (ret), "=m" (*p) \
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: "r" (cmpval), "r" (newval), "m" (*p) \
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: "memory")
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/*
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* Some common forms of cmpxch.
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*/
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static __inline uint32_t
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ia64_cmpxchg_acq_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval)
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{
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uint32_t ret;
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IA64_CMPXCHG(4, acq, p, cmpval, newval, ret);
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return (ret);
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}
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static __inline uint32_t
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ia64_cmpxchg_rel_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval)
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{
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uint32_t ret;
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IA64_CMPXCHG(4, rel, p, cmpval, newval, ret);
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return (ret);
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}
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static __inline uint64_t
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ia64_cmpxchg_acq_64(volatile uint64_t* p, uint64_t cmpval, uint64_t newval)
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{
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uint64_t ret;
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IA64_CMPXCHG(8, acq, p, cmpval, newval, ret);
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return (ret);
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}
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static __inline uint64_t
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ia64_cmpxchg_rel_64(volatile uint64_t* p, uint64_t cmpval, uint64_t newval)
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{
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uint64_t ret;
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IA64_CMPXCHG(8, rel, p, cmpval, newval, ret);
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return (ret);
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}
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#define ATOMIC_STORE_LOAD(type, width, size) \
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static __inline uint##width##_t \
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ia64_ld_acq_##width(volatile uint##width##_t* p) \
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{ \
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uint##width##_t v; \
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__asm __volatile ("ld" size ".acq %0=%1" : "=r" (v) \
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: "m" (*p) : "memory"); \
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return (v); \
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} \
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\
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static __inline uint##width##_t \
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atomic_load_acq_##width(volatile uint##width##_t* p) \
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{ \
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uint##width##_t v; \
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__asm __volatile ("ld" size ".acq %0=%1" : "=r" (v) \
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: "m" (*p) : "memory"); \
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return (v); \
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} \
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\
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static __inline uint##width##_t \
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atomic_load_acq_##type(volatile uint##width##_t* p) \
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{ \
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uint##width##_t v; \
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__asm __volatile ("ld" size ".acq %0=%1" : "=r" (v) \
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: "m" (*p) : "memory"); \
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return (v); \
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} \
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\
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static __inline void \
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ia64_st_rel_##width(volatile uint##width##_t* p, uint##width##_t v) \
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{ \
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__asm __volatile ("st" size ".rel %0=%1" : "=m" (*p) \
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: "r" (v) : "memory"); \
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} \
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\
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static __inline void \
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atomic_store_rel_##width(volatile uint##width##_t* p, \
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uint##width##_t v) \
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{ \
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__asm __volatile ("st" size ".rel %0=%1" : "=m" (*p) \
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: "r" (v) : "memory"); \
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} \
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\
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static __inline void \
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atomic_store_rel_##type(volatile uint##width##_t* p, \
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uint##width##_t v) \
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{ \
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__asm __volatile ("st" size ".rel %0=%1" : "=m" (*p) \
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: "r" (v) : "memory"); \
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}
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ATOMIC_STORE_LOAD(char, 8, "1")
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ATOMIC_STORE_LOAD(short, 16, "2")
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ATOMIC_STORE_LOAD(int, 32, "4")
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ATOMIC_STORE_LOAD(long, 64, "8")
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#undef ATOMIC_STORE_LOAD
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#define IA64_ATOMIC(sz, type, name, width, op) \
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static __inline type \
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atomic_##name##_acq_##width(volatile type *p, type v) \
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{ \
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type old, ret; \
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do { \
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old = *p; \
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IA64_CMPXCHG(sz, acq, p, old, old op v, ret); \
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} while (ret != old); \
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return (old); \
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} \
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\
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static __inline type \
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atomic_##name##_rel_##width(volatile type *p, type v) \
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{ \
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type old, ret; \
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do { \
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old = *p; \
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IA64_CMPXCHG(sz, rel, p, old, old op v, ret); \
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} while (ret != old); \
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return (old); \
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}
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IA64_ATOMIC(1, uint8_t, set, 8, |)
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IA64_ATOMIC(2, uint16_t, set, 16, |)
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IA64_ATOMIC(4, uint32_t, set, 32, |)
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IA64_ATOMIC(8, uint64_t, set, 64, |)
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IA64_ATOMIC(1, uint8_t, clear, 8, &~)
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IA64_ATOMIC(2, uint16_t, clear, 16, &~)
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IA64_ATOMIC(4, uint32_t, clear, 32, &~)
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IA64_ATOMIC(8, uint64_t, clear, 64, &~)
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IA64_ATOMIC(1, uint8_t, add, 8, +)
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IA64_ATOMIC(2, uint16_t, add, 16, +)
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IA64_ATOMIC(4, uint32_t, add, 32, +)
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IA64_ATOMIC(8, uint64_t, add, 64, +)
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IA64_ATOMIC(1, uint8_t, subtract, 8, -)
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IA64_ATOMIC(2, uint16_t, subtract, 16, -)
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IA64_ATOMIC(4, uint32_t, subtract, 32, -)
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IA64_ATOMIC(8, uint64_t, subtract, 64, -)
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#undef IA64_ATOMIC
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#define atomic_set_8 atomic_set_acq_8
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#define atomic_clear_8 atomic_clear_acq_8
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#define atomic_add_8 atomic_add_acq_8
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#define atomic_subtract_8 atomic_subtract_acq_8
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#define atomic_set_16 atomic_set_acq_16
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#define atomic_clear_16 atomic_clear_acq_16
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#define atomic_add_16 atomic_add_acq_16
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#define atomic_subtract_16 atomic_subtract_acq_16
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#define atomic_set_32 atomic_set_acq_32
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#define atomic_clear_32 atomic_clear_acq_32
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#define atomic_add_32 atomic_add_acq_32
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#define atomic_subtract_32 atomic_subtract_acq_32
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#define atomic_set_64 atomic_set_acq_64
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#define atomic_clear_64 atomic_clear_acq_64
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#define atomic_add_64 atomic_add_acq_64
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#define atomic_subtract_64 atomic_subtract_acq_64
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#define atomic_set_char atomic_set_8
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#define atomic_clear_char atomic_clear_8
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#define atomic_add_char atomic_add_8
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#define atomic_subtract_char atomic_subtract_8
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#define atomic_set_acq_char atomic_set_acq_8
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#define atomic_clear_acq_char atomic_clear_acq_8
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#define atomic_add_acq_char atomic_add_acq_8
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#define atomic_subtract_acq_char atomic_subtract_acq_8
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#define atomic_set_rel_char atomic_set_rel_8
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#define atomic_clear_rel_char atomic_clear_rel_8
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#define atomic_add_rel_char atomic_add_rel_8
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#define atomic_subtract_rel_char atomic_subtract_rel_8
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#define atomic_set_short atomic_set_16
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#define atomic_clear_short atomic_clear_16
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#define atomic_add_short atomic_add_16
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#define atomic_subtract_short atomic_subtract_16
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#define atomic_set_acq_short atomic_set_acq_16
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#define atomic_clear_acq_short atomic_clear_acq_16
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#define atomic_add_acq_short atomic_add_acq_16
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#define atomic_subtract_acq_short atomic_subtract_acq_16
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#define atomic_set_rel_short atomic_set_rel_16
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#define atomic_clear_rel_short atomic_clear_rel_16
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#define atomic_add_rel_short atomic_add_rel_16
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#define atomic_subtract_rel_short atomic_subtract_rel_16
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#define atomic_set_int atomic_set_32
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#define atomic_clear_int atomic_clear_32
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#define atomic_add_int atomic_add_32
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#define atomic_subtract_int atomic_subtract_32
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#define atomic_set_acq_int atomic_set_acq_32
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#define atomic_clear_acq_int atomic_clear_acq_32
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#define atomic_add_acq_int atomic_add_acq_32
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#define atomic_subtract_acq_int atomic_subtract_acq_32
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#define atomic_set_rel_int atomic_set_rel_32
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#define atomic_clear_rel_int atomic_clear_rel_32
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#define atomic_add_rel_int atomic_add_rel_32
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#define atomic_subtract_rel_int atomic_subtract_rel_32
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#define atomic_set_long atomic_set_64
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#define atomic_clear_long atomic_clear_64
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#define atomic_add_long atomic_add_64
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#define atomic_subtract_long atomic_subtract_64
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#define atomic_set_acq_long atomic_set_acq_64
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#define atomic_clear_acq_long atomic_clear_acq_64
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#define atomic_add_acq_long atomic_add_acq_64
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#define atomic_subtract_acq_long atomic_subtract_acq_64
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#define atomic_set_rel_long atomic_set_rel_64
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#define atomic_clear_rel_long atomic_clear_rel_64
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#define atomic_add_rel_long atomic_add_rel_64
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#define atomic_subtract_rel_long atomic_subtract_rel_64
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#undef IA64_CMPXCHG
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/*
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* Atomically compare the value stored at *p with cmpval and if the
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* two values are equal, update the value of *p with newval. Returns
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* zero if the compare failed, nonzero otherwise.
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*/
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static __inline int
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atomic_cmpset_acq_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval)
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{
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return (ia64_cmpxchg_acq_32(p, cmpval, newval) == cmpval);
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}
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static __inline int
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atomic_cmpset_rel_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval)
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{
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return (ia64_cmpxchg_rel_32(p, cmpval, newval) == cmpval);
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}
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/*
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* Atomically compare the value stored at *p with cmpval and if the
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* two values are equal, update the value of *p with newval. Returns
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* zero if the compare failed, nonzero otherwise.
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*/
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static __inline int
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atomic_cmpset_acq_64(volatile uint64_t* p, uint64_t cmpval, uint64_t newval)
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{
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return (ia64_cmpxchg_acq_64(p, cmpval, newval) == cmpval);
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}
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static __inline int
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atomic_cmpset_rel_64(volatile uint64_t* p, uint64_t cmpval, uint64_t newval)
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{
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return (ia64_cmpxchg_rel_64(p, cmpval, newval) == cmpval);
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}
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#define atomic_cmpset_32 atomic_cmpset_acq_32
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#define atomic_cmpset_64 atomic_cmpset_acq_64
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#define atomic_cmpset_int atomic_cmpset_32
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#define atomic_cmpset_long atomic_cmpset_64
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#define atomic_cmpset_acq_int atomic_cmpset_acq_32
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#define atomic_cmpset_rel_int atomic_cmpset_rel_32
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#define atomic_cmpset_acq_long atomic_cmpset_acq_64
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#define atomic_cmpset_rel_long atomic_cmpset_rel_64
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static __inline int
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atomic_cmpset_acq_ptr(volatile void *dst, void *exp, void *src)
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{
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int ret;
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ret = atomic_cmpset_acq_long((volatile u_long *)dst, (u_long)exp,
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(u_long)src);
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return (ret);
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}
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static __inline int
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atomic_cmpset_rel_ptr(volatile void *dst, void *exp, void *src)
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{
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int ret;
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ret = atomic_cmpset_rel_long((volatile u_long *)dst, (u_long)exp,
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(u_long)src);
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return (ret);
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}
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#define atomic_cmpset_ptr atomic_cmpset_acq_ptr
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static __inline void *
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atomic_load_acq_ptr(volatile void *p)
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{
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return ((void *)atomic_load_acq_long((volatile u_long *)p));
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}
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static __inline void
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atomic_store_rel_ptr(volatile void *p, void *v)
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{
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atomic_store_rel_long((volatile u_long *)p, (u_long)v);
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}
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#define ATOMIC_PTR(NAME) \
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static __inline void \
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atomic_##NAME##_ptr(volatile void *p, uintptr_t v) \
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{ \
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atomic_##NAME##_long((volatile u_long *)p, v); \
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} \
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\
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static __inline void \
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atomic_##NAME##_acq_ptr(volatile void *p, uintptr_t v) \
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{ \
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atomic_##NAME##_acq_long((volatile u_long *)p, v); \
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} \
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\
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static __inline void \
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atomic_##NAME##_rel_ptr(volatile void *p, uintptr_t v) \
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{ \
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atomic_##NAME##_rel_long((volatile u_long *)p, v); \
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}
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ATOMIC_PTR(set)
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ATOMIC_PTR(clear)
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ATOMIC_PTR(add)
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ATOMIC_PTR(subtract)
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#undef ATOMIC_PTR
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static __inline uint32_t
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atomic_readandclear_32(volatile uint32_t* p)
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{
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uint32_t val;
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do {
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val = *p;
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} while (!atomic_cmpset_32(p, val, 0));
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return (val);
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}
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static __inline uint64_t
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atomic_readandclear_64(volatile uint64_t* p)
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{
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uint64_t val;
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do {
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val = *p;
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} while (!atomic_cmpset_64(p, val, 0));
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return (val);
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}
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#define atomic_readandclear_int atomic_readandclear_32
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#define atomic_readandclear_long atomic_readandclear_64
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#endif /* ! _MACHINE_ATOMIC_H_ */
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