390 lines
12 KiB
C
390 lines
12 KiB
C
/* $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $ */
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/*-
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* Copyright (c) 1994-1998 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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* This code is derived from software written for Brini by Mark Brinicombe
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Brini.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* RiscBSD kernel project
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*
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* machdep.c
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*
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* Machine dependant functions for kernel setup
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*
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* This file needs a lot of work.
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*
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* Created : 17/09/94
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_md.h"
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#define _ARM32_BUS_DMA_PRIVATE
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/sysproto.h>
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#include <sys/signalvar.h>
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#include <sys/imgact.h>
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#include <sys/kernel.h>
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#include <sys/ktr.h>
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#include <sys/linker.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/mutex.h>
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#include <sys/pcpu.h>
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#include <sys/proc.h>
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#include <sys/ptrace.h>
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#include <sys/cons.h>
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#include <sys/bio.h>
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#include <sys/bus.h>
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#include <sys/buf.h>
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#include <sys/exec.h>
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#include <sys/kdb.h>
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#include <machine/reg.h>
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#include <machine/cpu.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <vm/vm_object.h>
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#include <vm/vm_page.h>
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#include <vm/vm_map.h>
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#include <machine/vmparam.h>
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#include <machine/pcb.h>
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#include <machine/undefined.h>
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#include <machine/machdep.h>
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#include <machine/metadata.h>
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#include <machine/armreg.h>
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#include <machine/bus.h>
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#include <sys/reboot.h>
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#include <arm/sa11x0/sa11x0_reg.h>
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#define MDROOT_ADDR 0xd0400000
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#define KERNEL_PT_VMEM 0 /* Page table for mapping video memory */
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#define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
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#define KERNEL_PT_IO 3 /* Page table for mapping IO */
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#define KERNEL_PT_IRQ 2 /* Page table for mapping irq handler */
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#define KERNEL_PT_KERNEL 1 /* Page table for mapping kernel */
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#define KERNEL_PT_L1 4 /* Page table for mapping l1pt */
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#define KERNEL_PT_VMDATA 5 /* Page tables for mapping kernel VM */
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#define KERNEL_PT_VMDATA_NUM 7 /* start with 16MB of KVM */
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#define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
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#define KERNEL_VM_BASE (KERNBASE + 0x00100000)
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#define KERNEL_VM_SIZE 0x05000000
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extern u_int data_abort_handler_address;
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extern u_int prefetch_abort_handler_address;
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extern u_int undefined_handler_address;
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struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
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extern vm_offset_t sa1110_uart_vaddr;
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extern vm_offset_t sa1_cache_clean_addr;
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#ifndef MD_ROOT_SIZE
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#define MD_ROOT_SIZE 65535
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#endif
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/* Physical and virtual addresses for some global pages */
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vm_paddr_t phys_avail[10];
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vm_paddr_t dump_avail[4];
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vm_paddr_t physical_start;
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vm_paddr_t physical_end;
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vm_paddr_t physical_freestart;
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struct pv_addr systempage;
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struct pv_addr irqstack;
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struct pv_addr undstack;
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struct pv_addr abtstack;
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struct pv_addr kernelstack;
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/* Static device mappings. */
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static const struct pmap_devmap assabet_devmap[] = {
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/*
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* Map the on-board devices VA == PA so that we can access them
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* with the MMU on or off.
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*/
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{
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SACOM1_VBASE,
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SACOM1_BASE,
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SACOM1_SIZE,
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VM_PROT_READ|VM_PROT_WRITE,
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PTE_NOCACHE,
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},
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{
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SAIPIC_BASE,
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SAIPIC_BASE,
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SAIPIC_SIZE,
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VM_PROT_READ|VM_PROT_WRITE,
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PTE_NOCACHE,
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},
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{
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0,
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0,
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0,
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0,
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0,
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}
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};
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struct arm32_dma_range *
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bus_dma_get_range(void)
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{
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return (NULL);
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}
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int
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bus_dma_get_range_nb(void)
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{
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return (0);
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}
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void
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cpu_reset()
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{
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cpu_halt();
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while (1);
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}
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#define CPU_SA110_CACHE_CLEAN_SIZE (0x4000 * 2)
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void *
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initarm(struct arm_boot_params *abp)
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{
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struct pv_addr kernel_l1pt;
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struct pv_addr md_addr;
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struct pv_addr md_bla;
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struct pv_addr dpcpu;
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int loop;
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u_int l1pagetable;
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vm_offset_t freemempos;
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vm_offset_t lastalloced;
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vm_offset_t lastaddr;
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uint32_t memsize = 32 * 1024 * 1024;
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sa1110_uart_vaddr = SACOM1_VBASE;
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boothowto = RB_VERBOSE | RB_SINGLE; /* Default value */
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lastaddr = parse_boot_param(abp);
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cninit();
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set_cpufuncs();
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physmem = memsize / PAGE_SIZE;
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pcpu0_init();
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/* Do basic tuning, hz etc */
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init_param1();
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physical_start = (vm_offset_t) KERNBASE;
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physical_end = lastaddr;
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physical_freestart = (((vm_offset_t)physical_end) + PAGE_MASK) & ~PAGE_MASK;
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md_addr.pv_va = md_addr.pv_pa = MDROOT_ADDR;
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freemempos = (vm_offset_t)round_page(physical_freestart);
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memset((void *)freemempos, 0, 256*1024);
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/* Define a macro to simplify memory allocation */
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#define valloc_pages(var, np) \
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alloc_pages((var).pv_pa, (np)); \
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(var).pv_va = (var).pv_pa;
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#define alloc_pages(var, np) \
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(var) = freemempos; \
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freemempos += ((np) * PAGE_SIZE);\
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memset((char *)(var), 0, ((np) * PAGE_SIZE));
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while ((freemempos & (L1_TABLE_SIZE - 1)) != 0)
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freemempos += PAGE_SIZE;
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valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
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valloc_pages(md_bla, L2_TABLE_SIZE / PAGE_SIZE);
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alloc_pages(sa1_cache_clean_addr, CPU_SA110_CACHE_CLEAN_SIZE / PAGE_SIZE);
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for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
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if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
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valloc_pages(kernel_pt_table[loop],
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L2_TABLE_SIZE / PAGE_SIZE);
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} else {
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kernel_pt_table[loop].pv_pa = freemempos +
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(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
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L2_TABLE_SIZE_REAL;
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kernel_pt_table[loop].pv_va =
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kernel_pt_table[loop].pv_pa;
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}
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}
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/*
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* Allocate a page for the system page mapped to V0x00000000
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* This page will just contain the system vectors and can be
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* shared by all processes.
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*/
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valloc_pages(systempage, 1);
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/* Allocate dynamic per-cpu area. */
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valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
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dpcpu_init((void *)dpcpu.pv_va, 0);
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/* Allocate stacks for all modes */
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valloc_pages(irqstack, IRQ_STACK_SIZE);
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valloc_pages(abtstack, ABT_STACK_SIZE);
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valloc_pages(undstack, UND_STACK_SIZE);
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valloc_pages(kernelstack, KSTACK_PAGES);
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lastalloced = kernelstack.pv_va;
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/*
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* Allocate memory for the l1 and l2 page tables. The scheme to avoid
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* wasting memory by allocating the l1pt on the first 16k memory was
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* taken from NetBSD rpc_machdep.c. NKPT should be greater than 12 for
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* this to work (which is supposed to be the case).
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*/
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/*
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* Now we start construction of the L1 page table
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* We start by mapping the L2 page tables into the L1.
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* This means that we can replace L1 mappings later on if necessary
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*/
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l1pagetable = kernel_l1pt.pv_pa;
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/* Map the L2 pages tables in the L1 page table */
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pmap_link_l2pt(l1pagetable, 0x00000000,
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&kernel_pt_table[KERNEL_PT_SYS]);
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pmap_link_l2pt(l1pagetable, KERNBASE,
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&kernel_pt_table[KERNEL_PT_KERNEL]);
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pmap_link_l2pt(l1pagetable, 0xd0000000,
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&kernel_pt_table[KERNEL_PT_IO]);
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pmap_link_l2pt(l1pagetable, lastalloced & ~((L1_S_SIZE * 4) - 1),
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&kernel_pt_table[KERNEL_PT_L1]);
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pmap_link_l2pt(l1pagetable, 0x90000000, &kernel_pt_table[KERNEL_PT_IRQ]);
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pmap_link_l2pt(l1pagetable, MDROOT_ADDR,
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&md_bla);
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for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; ++loop)
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pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00100000,
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&kernel_pt_table[KERNEL_PT_VMDATA + loop]);
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pmap_map_chunk(l1pagetable, KERNBASE, KERNBASE,
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((uint32_t)lastaddr - KERNBASE), VM_PROT_READ|VM_PROT_WRITE,
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PTE_CACHE);
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/* Map the DPCPU pages */
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pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa, DPCPU_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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/* Map the stack pages */
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pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
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IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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pmap_map_chunk(l1pagetable, md_addr.pv_va, md_addr.pv_pa,
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MD_ROOT_SIZE * 1024, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
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ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
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UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
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KSTACK_PAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
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L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
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for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
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pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
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kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
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}
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pmap_map_chunk(l1pagetable, md_bla.pv_va, md_bla.pv_pa, L2_TABLE_SIZE,
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VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
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/* Map the vector page. */
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pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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/* Map the statically mapped devices. */
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pmap_devmap_bootstrap(l1pagetable, assabet_devmap);
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pmap_map_chunk(l1pagetable, sa1_cache_clean_addr, 0xf0000000,
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CPU_SA110_CACHE_CLEAN_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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data_abort_handler_address = (u_int)data_abort_handler;
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prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
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undefined_handler_address = (u_int)undefinedinstruction_bounce;
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undefined_init();
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cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
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setttb(kernel_l1pt.pv_pa);
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cpu_tlb_flushID();
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cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
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/*
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* Pages were allocated during the secondary bootstrap for the
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* stacks for different CPU modes.
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* We must now set the r13 registers in the different CPU modes to
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* point to these stacks.
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* Since the ARM stacks use STMFD etc. we must set r13 to the top end
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* of the stack memory.
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*/
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set_stackptrs(0);
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/*
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* We must now clean the cache again....
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* Cleaning may be done by reading new data to displace any
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* dirty data in the cache. This will have happened in setttb()
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* but since we are boot strapping the addresses used for the read
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* may have just been remapped and thus the cache could be out
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* of sync. A re-clean after the switch will cure this.
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* After booting there are no gross relocations of the kernel thus
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* this problem will not occur after initarm().
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*/
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cpu_idcache_wbinv_all();
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bootverbose = 1;
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/* Set stack for exception handlers */
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init_proc0(kernelstack.pv_va);
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/* Enable MMU, I-cache, D-cache, write buffer. */
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cpufunc_control(0x337f, 0x107d);
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arm_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
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pmap_curmaxkvaddr = freemempos + KERNEL_PT_VMDATA_NUM * 0x400000;
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dump_avail[0] = phys_avail[0] = round_page(virtual_avail);
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dump_avail[1] = phys_avail[1] = 0xc0000000 + 0x02000000 - 1;
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dump_avail[2] = phys_avail[2] = 0;
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dump_avail[3] = phys_avail[3] = 0;
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mutex_init();
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vm_max_kernel_address = 0xd0000000;
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pmap_bootstrap(freemempos, &kernel_l1pt);
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init_param2(physmem);
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kdb_init();
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return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
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sizeof(struct pcb)));
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}
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