502 lines
14 KiB
C
502 lines
14 KiB
C
/*-
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* Copyright (c) 1998 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_ATOMIC_H_
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#define _MACHINE_ATOMIC_H_
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#include <machine/alpha_cpu.h>
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/*
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* Various simple arithmetic on memory which is atomic in the presence
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* of interrupts and SMP safe.
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*/
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void atomic_set_8(volatile u_int8_t *, u_int8_t);
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void atomic_clear_8(volatile u_int8_t *, u_int8_t);
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void atomic_add_8(volatile u_int8_t *, u_int8_t);
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void atomic_subtract_8(volatile u_int8_t *, u_int8_t);
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void atomic_set_16(volatile u_int16_t *, u_int16_t);
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void atomic_clear_16(volatile u_int16_t *, u_int16_t);
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void atomic_add_16(volatile u_int16_t *, u_int16_t);
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void atomic_subtract_16(volatile u_int16_t *, u_int16_t);
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static __inline void atomic_set_32(volatile u_int32_t *p, u_int32_t v)
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{
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u_int32_t temp;
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__asm __volatile (
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"1:\tldl_l %0, %2\n\t" /* load old value */
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"bis %0, %3, %0\n\t" /* calculate new value */
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"stl_c %0, %1\n\t" /* attempt to store */
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"beq %0, 2f\n\t" /* spin if failed */
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"mb\n\t" /* drain to memory */
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".section .text3,\"ax\"\n" /* improve branch prediction */
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"2:\tbr 1b\n" /* try again */
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".previous\n"
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: "=&r" (temp), "=m" (*p)
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: "m" (*p), "r" (v)
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: "memory");
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}
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static __inline void atomic_clear_32(volatile u_int32_t *p, u_int32_t v)
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{
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u_int32_t temp;
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__asm __volatile (
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"1:\tldl_l %0, %2\n\t" /* load old value */
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"bic %0, %3, %0\n\t" /* calculate new value */
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"stl_c %0, %1\n\t" /* attempt to store */
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"beq %0, 2f\n\t" /* spin if failed */
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"mb\n\t" /* drain to memory */
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".section .text3,\"ax\"\n" /* improve branch prediction */
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"2:\tbr 1b\n" /* try again */
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".previous\n"
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: "=&r" (temp), "=m" (*p)
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: "m" (*p), "r" (v)
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: "memory");
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}
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static __inline void atomic_add_32(volatile u_int32_t *p, u_int32_t v)
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{
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u_int32_t temp;
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__asm __volatile (
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"1:\tldl_l %0, %2\n\t" /* load old value */
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"addl %0, %3, %0\n\t" /* calculate new value */
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"stl_c %0, %1\n\t" /* attempt to store */
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"beq %0, 2f\n\t" /* spin if failed */
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"mb\n\t" /* drain to memory */
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".section .text3,\"ax\"\n" /* improve branch prediction */
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"2:\tbr 1b\n" /* try again */
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".previous\n"
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: "=&r" (temp), "=m" (*p)
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: "m" (*p), "r" (v)
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: "memory");
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}
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static __inline void atomic_subtract_32(volatile u_int32_t *p, u_int32_t v)
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{
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u_int32_t temp;
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__asm __volatile (
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"1:\tldl_l %0, %2\n\t" /* load old value */
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"subl %0, %3, %0\n\t" /* calculate new value */
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"stl_c %0, %1\n\t" /* attempt to store */
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"beq %0, 2f\n\t" /* spin if failed */
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"mb\n\t" /* drain to memory */
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".section .text3,\"ax\"\n" /* improve branch prediction */
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"2:\tbr 1b\n" /* try again */
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".previous\n"
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: "=&r" (temp), "=m" (*p)
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: "m" (*p), "r" (v)
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: "memory");
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}
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static __inline u_int32_t atomic_readandclear_32(volatile u_int32_t *addr)
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{
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u_int32_t result,temp;
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__asm __volatile (
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"wmb\n" /* ensure pending writes have drained */
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"1:\tldl_l %0,%3\n\t" /* load current value, asserting lock */
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"ldiq %1,0\n\t" /* value to store */
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"stl_c %1,%2\n\t" /* attempt to store */
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"beq %1,2f\n\t" /* if the store failed, spin */
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"br 3f\n" /* it worked, exit */
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"2:\tbr 1b\n" /* *addr not updated, loop */
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"3:\tmb\n" /* it worked */
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: "=&r"(result), "=&r"(temp), "=m" (*addr)
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: "m"(*addr)
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: "memory");
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return result;
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}
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static __inline void atomic_set_64(volatile u_int64_t *p, u_int64_t v)
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{
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u_int64_t temp;
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__asm __volatile (
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"1:\tldq_l %0, %2\n\t" /* load old value */
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"bis %0, %3, %0\n\t" /* calculate new value */
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"stq_c %0, %1\n\t" /* attempt to store */
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"beq %0, 2f\n\t" /* spin if failed */
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"mb\n\t" /* drain to memory */
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".section .text3,\"ax\"\n" /* improve branch prediction */
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"2:\tbr 1b\n" /* try again */
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".previous\n"
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: "=&r" (temp), "=m" (*p)
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: "m" (*p), "r" (v)
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: "memory");
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}
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static __inline void atomic_clear_64(volatile u_int64_t *p, u_int64_t v)
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{
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u_int64_t temp;
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__asm __volatile (
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"1:\tldq_l %0, %2\n\t" /* load old value */
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"bic %0, %3, %0\n\t" /* calculate new value */
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"stq_c %0, %1\n\t" /* attempt to store */
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"beq %0, 2f\n\t" /* spin if failed */
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"mb\n\t" /* drain to memory */
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".section .text3,\"ax\"\n" /* improve branch prediction */
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"2:\tbr 1b\n" /* try again */
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".previous\n"
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: "=&r" (temp), "=m" (*p)
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: "m" (*p), "r" (v)
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: "memory");
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}
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static __inline void atomic_add_64(volatile u_int64_t *p, u_int64_t v)
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{
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u_int64_t temp;
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__asm __volatile (
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"1:\tldq_l %0, %2\n\t" /* load old value */
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"addq %0, %3, %0\n\t" /* calculate new value */
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"stq_c %0, %1\n\t" /* attempt to store */
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"beq %0, 2f\n\t" /* spin if failed */
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"mb\n\t" /* drain to memory */
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".section .text3,\"ax\"\n" /* improve branch prediction */
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"2:\tbr 1b\n" /* try again */
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".previous\n"
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: "=&r" (temp), "=m" (*p)
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: "m" (*p), "r" (v)
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: "memory");
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}
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static __inline void atomic_subtract_64(volatile u_int64_t *p, u_int64_t v)
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{
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u_int64_t temp;
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__asm __volatile (
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"1:\tldq_l %0, %2\n\t" /* load old value */
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"subq %0, %3, %0\n\t" /* calculate new value */
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"stq_c %0, %1\n\t" /* attempt to store */
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"beq %0, 2f\n\t" /* spin if failed */
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"mb\n\t" /* drain to memory */
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".section .text3,\"ax\"\n" /* improve branch prediction */
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"2:\tbr 1b\n" /* try again */
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".previous\n"
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: "=&r" (temp), "=m" (*p)
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: "m" (*p), "r" (v)
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: "memory");
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}
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static __inline u_int64_t atomic_readandclear_64(volatile u_int64_t *addr)
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{
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u_int64_t result,temp;
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__asm __volatile (
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"wmb\n" /* ensure pending writes have drained */
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"1:\tldq_l %0,%3\n\t" /* load current value, asserting lock */
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"ldiq %1,0\n\t" /* value to store */
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"stq_c %1,%2\n\t" /* attempt to store */
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"beq %1,2f\n\t" /* if the store failed, spin */
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"br 3f\n" /* it worked, exit */
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"2:\tbr 1b\n" /* *addr not updated, loop */
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"3:\tmb\n" /* it worked */
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: "=&r"(result), "=&r"(temp), "=m" (*addr)
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: "m"(*addr)
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: "memory");
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return result;
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}
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#define atomic_set_char atomic_set_8
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#define atomic_clear_char atomic_clear_8
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#define atomic_add_char atomic_add_8
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#define atomic_subtract_char atomic_subtract_8
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#define atomic_set_short atomic_set_16
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#define atomic_clear_short atomic_clear_16
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#define atomic_add_short atomic_add_16
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#define atomic_subtract_short atomic_subtract_16
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#define atomic_set_int atomic_set_32
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#define atomic_clear_int atomic_clear_32
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#define atomic_add_int atomic_add_32
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#define atomic_subtract_int atomic_subtract_32
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#define atomic_readandclear_int atomic_readandclear_32
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#define atomic_set_long atomic_set_64
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#define atomic_clear_long atomic_clear_64
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#define atomic_add_long atomic_add_64
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#define atomic_subtract_long atomic_subtract_64
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#define atomic_readandclear_long atomic_readandclear_64
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#define ATOMIC_ACQ_REL(NAME, WIDTH, TYPE) \
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static __inline void \
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atomic_##NAME##_acq_##WIDTH(volatile u_int##WIDTH##_t *p, u_int##WIDTH##_t v)\
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{ \
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alpha_mb(); \
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atomic_##NAME##_##WIDTH(p, v); \
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} \
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\
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static __inline void \
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atomic_##NAME##_rel_##WIDTH(volatile u_int##WIDTH##_t *p, u_int##WIDTH##_t v)\
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{ \
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atomic_##NAME##_##WIDTH(p, v); \
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alpha_wmb(); \
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} \
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\
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static __inline void \
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atomic_##NAME##_acq_##TYPE(volatile u_int##WIDTH##_t *p, u_int##WIDTH##_t v)\
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{ \
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alpha_mb(); \
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atomic_##NAME##_##WIDTH(p, v); \
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} \
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\
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static __inline void \
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atomic_##NAME##_rel_##TYPE(volatile u_int##WIDTH##_t *p, u_int##WIDTH##_t v)\
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{ \
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atomic_##NAME##_##WIDTH(p, v); \
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alpha_wmb(); \
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}
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ATOMIC_ACQ_REL(set, 8, char)
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ATOMIC_ACQ_REL(clear, 8, char)
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ATOMIC_ACQ_REL(add, 8, char)
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ATOMIC_ACQ_REL(subtract, 8, char)
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ATOMIC_ACQ_REL(set, 16, short)
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ATOMIC_ACQ_REL(clear, 16, short)
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ATOMIC_ACQ_REL(add, 16, short)
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ATOMIC_ACQ_REL(subtract, 16, short)
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ATOMIC_ACQ_REL(set, 32, int)
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ATOMIC_ACQ_REL(clear, 32, int)
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ATOMIC_ACQ_REL(add, 32, int)
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ATOMIC_ACQ_REL(subtract, 32, int)
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ATOMIC_ACQ_REL(set, 64, long)
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ATOMIC_ACQ_REL(clear, 64, long)
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ATOMIC_ACQ_REL(add, 64, long)
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ATOMIC_ACQ_REL(subtract, 64, long)
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#undef ATOMIC_ACQ_REL
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/*
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* We assume that a = b will do atomic loads and stores.
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*/
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#define ATOMIC_STORE_LOAD(TYPE, WIDTH) \
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static __inline u_##TYPE \
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atomic_load_acq_##WIDTH(volatile u_##TYPE *p) \
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{ \
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alpha_mb(); \
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return (*p); \
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} \
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\
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static __inline void \
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atomic_store_rel_##WIDTH(volatile u_##TYPE *p, u_##TYPE v)\
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{ \
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*p = v; \
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alpha_wmb(); \
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} \
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static __inline u_##TYPE \
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atomic_load_acq_##TYPE(volatile u_##TYPE *p) \
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{ \
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alpha_mb(); \
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return (*p); \
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} \
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\
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static __inline void \
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atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
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{ \
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*p = v; \
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alpha_wmb(); \
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}
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ATOMIC_STORE_LOAD(char, 8)
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ATOMIC_STORE_LOAD(short, 16)
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ATOMIC_STORE_LOAD(int, 32)
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ATOMIC_STORE_LOAD(long, 64)
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#undef ATOMIC_STORE_LOAD
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/*
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* Atomically compare the value stored at *p with cmpval and if the
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* two values are equal, update the value of *p with newval. Returns
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* zero if the compare failed, nonzero otherwise.
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*/
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static __inline u_int32_t
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atomic_cmpset_32(volatile u_int32_t* p, u_int32_t cmpval, u_int32_t newval)
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{
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u_int32_t ret;
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__asm __volatile (
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"1:\tldl_l %0, %4\n\t" /* load old value */
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"cmpeq %0, %2, %0\n\t" /* compare */
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"beq %0, 2f\n\t" /* exit if not equal */
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"mov %3, %0\n\t" /* value to store */
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"stl_c %0, %1\n\t" /* attempt to store */
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"beq %0, 3f\n\t" /* if it failed, spin */
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"2:\n" /* done */
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".section .text3,\"ax\"\n" /* improve branch prediction */
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"3:\tbr 1b\n" /* try again */
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".previous\n"
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: "=&r" (ret), "=m" (*p)
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: "r" (cmpval), "r" (newval), "m" (*p)
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: "memory");
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return ret;
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}
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/*
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* Atomically compare the value stored at *p with cmpval and if the
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* two values are equal, update the value of *p with newval. Returns
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* zero if the compare failed, nonzero otherwise.
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*/
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static __inline u_int64_t
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atomic_cmpset_64(volatile u_int64_t* p, u_int64_t cmpval, u_int64_t newval)
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{
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u_int64_t ret;
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__asm __volatile (
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"1:\tldq_l %0, %4\n\t" /* load old value */
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"cmpeq %0, %2, %0\n\t" /* compare */
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"beq %0, 2f\n\t" /* exit if not equal */
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"mov %3, %0\n\t" /* value to store */
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"stq_c %0, %1\n\t" /* attempt to store */
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"beq %0, 3f\n\t" /* if it failed, spin */
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"2:\n" /* done */
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".section .text3,\"ax\"\n" /* improve branch prediction */
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"3:\tbr 1b\n" /* try again */
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".previous\n"
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: "=&r" (ret), "=m" (*p)
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: "r" (cmpval), "r" (newval), "m" (*p)
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: "memory");
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return ret;
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}
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#define atomic_cmpset_int atomic_cmpset_32
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#define atomic_cmpset_long atomic_cmpset_64
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static __inline int
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atomic_cmpset_ptr(volatile void *dst, void *exp, void *src)
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{
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return (atomic_cmpset_long((volatile u_long *)dst, (u_long)exp,
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(u_long)src));
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}
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static __inline u_int32_t
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atomic_cmpset_acq_32(volatile u_int32_t *p, u_int32_t cmpval, u_int32_t newval)
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{
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alpha_mb();
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return (atomic_cmpset_32(p, cmpval, newval));
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}
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static __inline u_int32_t
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atomic_cmpset_rel_32(volatile u_int32_t *p, u_int32_t cmpval, u_int32_t newval)
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{
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int retval;
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retval = atomic_cmpset_32(p, cmpval, newval);
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alpha_wmb();
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return (retval);
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}
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static __inline u_int64_t
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atomic_cmpset_acq_64(volatile u_int64_t *p, u_int64_t cmpval, u_int64_t newval)
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{
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alpha_mb();
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return (atomic_cmpset_64(p, cmpval, newval));
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}
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static __inline u_int64_t
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atomic_cmpset_rel_64(volatile u_int64_t *p, u_int64_t cmpval, u_int64_t newval)
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{
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int retval;
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retval = atomic_cmpset_64(p, cmpval, newval);
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alpha_wmb();
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return (retval);
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}
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#define atomic_cmpset_acq_int atomic_cmpset_acq_32
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#define atomic_cmpset_rel_int atomic_cmpset_rel_32
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#define atomic_cmpset_acq_long atomic_cmpset_acq_64
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#define atomic_cmpset_rel_long atomic_cmpset_rel_64
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static __inline int
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atomic_cmpset_acq_ptr(volatile void *dst, void *exp, void *src)
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{
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return (atomic_cmpset_acq_long((volatile u_long *)dst, (u_long)exp,
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(u_long)src));
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}
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static __inline int
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atomic_cmpset_rel_ptr(volatile void *dst, void *exp, void *src)
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{
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return (atomic_cmpset_rel_long((volatile u_long *)dst, (u_long)exp,
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(u_long)src));
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}
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static __inline void *
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atomic_load_acq_ptr(volatile void *p)
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|
{
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return (void *)atomic_load_acq_long((volatile u_long *)p);
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}
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static __inline void
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atomic_store_rel_ptr(volatile void *p, void *v)
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{
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atomic_store_rel_long((volatile u_long *)p, (u_long)v);
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}
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#define ATOMIC_PTR(NAME) \
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static __inline void \
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atomic_##NAME##_ptr(volatile void *p, uintptr_t v) \
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{ \
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atomic_##NAME##_long((volatile u_long *)p, v); \
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} \
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\
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static __inline void \
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|
atomic_##NAME##_acq_ptr(volatile void *p, uintptr_t v) \
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|
{ \
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atomic_##NAME##_acq_long((volatile u_long *)p, v);\
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} \
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|
\
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static __inline void \
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atomic_##NAME##_rel_ptr(volatile void *p, uintptr_t v) \
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|
{ \
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atomic_##NAME##_rel_long((volatile u_long *)p, v);\
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}
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ATOMIC_PTR(set)
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ATOMIC_PTR(clear)
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ATOMIC_PTR(add)
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ATOMIC_PTR(subtract)
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|
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#undef ATOMIC_PTR
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#endif /* ! _MACHINE_ATOMIC_H_ */
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