219 lines
6.6 KiB
C
219 lines
6.6 KiB
C
/*-
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* ichsmb_pci.c
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*
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* Author: Archie Cobbs <archie@freebsd.org>
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* Copyright (c) 2000 Whistle Communications, Inc.
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* All rights reserved.
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* Author: Archie Cobbs <archie@freebsd.org>
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*
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* Subject to the following obligations and disclaimer of warranty, use and
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* redistribution of this software, in source or object code forms, with or
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* without modifications are expressly permitted by Whistle Communications;
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* provided, however, that:
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* 1. Any and all reproductions of the source or object code must include the
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* copyright notice above and the following disclaimer of warranties; and
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* 2. No rights are granted, in any manner or form, to use Whistle
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* Communications, Inc. trademarks, including the mark "WHISTLE
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* COMMUNICATIONS" on advertising, endorsements, or otherwise except as
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* such appears in the above copyright notice or in the software.
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*
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* THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO
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* REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE,
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* INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
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* WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY
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* REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS
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* SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE.
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* IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES
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* RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING
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* WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
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* PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY
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* OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Support for the SMBus controller logical device which is part of the
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* Intel 81801AA/AB/BA/CA/DC/EB (ICH/ICH[02345]) I/O controller hub chips.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/errno.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/syslog.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <machine/resource.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/smbus/smbconf.h>
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#include <dev/ichsmb/ichsmb_var.h>
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#include <dev/ichsmb/ichsmb_reg.h>
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/* PCI unique identifiers */
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#define ID_82801AA 0x24138086
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#define ID_82801AB 0x24238086
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#define ID_82801BA 0x24438086
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#define ID_82801CA 0x24838086
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#define ID_82801DC 0x24C38086
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#define ID_82801EB 0x24D38086
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#define PCIS_SERIALBUS_SMBUS_PROGIF 0x00
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/* Internal functions */
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static int ichsmb_pci_probe(device_t dev);
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static int ichsmb_pci_attach(device_t dev);
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/* Device methods */
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static device_method_t ichsmb_pci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, ichsmb_pci_probe),
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DEVMETHOD(device_attach, ichsmb_pci_attach),
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/* Bus methods */
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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/* SMBus methods */
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DEVMETHOD(smbus_callback, ichsmb_callback),
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DEVMETHOD(smbus_quick, ichsmb_quick),
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DEVMETHOD(smbus_sendb, ichsmb_sendb),
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DEVMETHOD(smbus_recvb, ichsmb_recvb),
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DEVMETHOD(smbus_writeb, ichsmb_writeb),
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DEVMETHOD(smbus_writew, ichsmb_writew),
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DEVMETHOD(smbus_readb, ichsmb_readb),
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DEVMETHOD(smbus_readw, ichsmb_readw),
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DEVMETHOD(smbus_pcall, ichsmb_pcall),
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DEVMETHOD(smbus_bwrite, ichsmb_bwrite),
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DEVMETHOD(smbus_bread, ichsmb_bread),
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{ 0, 0 }
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};
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static driver_t ichsmb_pci_driver = {
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"ichsmb",
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ichsmb_pci_methods,
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sizeof(struct ichsmb_softc)
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};
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static devclass_t ichsmb_pci_devclass;
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DRIVER_MODULE(ichsmb, pci, ichsmb_pci_driver, ichsmb_pci_devclass, 0, 0);
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static int
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ichsmb_pci_probe(device_t dev)
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{
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/* Check PCI identifier */
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switch (pci_get_devid(dev)) {
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case ID_82801AA:
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device_set_desc(dev, "Intel 82801AA (ICH) SMBus controller");
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break;
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case ID_82801AB:
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device_set_desc(dev, "Intel 82801AB (ICH0) SMBus controller");
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break;
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case ID_82801BA:
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device_set_desc(dev, "Intel 82801BA (ICH2) SMBus controller");
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break;
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case ID_82801CA:
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device_set_desc(dev, "Intel 82801CA (ICH3) SMBus controller");
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break;
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case ID_82801DC:
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device_set_desc(dev, "Intel 82801DC (ICH4) SMBus controller");
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break;
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case ID_82801EB:
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device_set_desc(dev, "Intel 82801EB (ICH5) SMBus controller");
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break;
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default:
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if (pci_get_class(dev) == PCIC_SERIALBUS
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&& pci_get_subclass(dev) == PCIS_SERIALBUS_SMBUS
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&& pci_get_progif(dev) == PCIS_SERIALBUS_SMBUS_PROGIF) {
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device_set_desc(dev, "SMBus controller");
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return (-2); /* XXX */
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}
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return (ENXIO);
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}
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/* Done */
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return (ichsmb_probe(dev));
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}
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static int
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ichsmb_pci_attach(device_t dev)
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{
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const sc_p sc = device_get_softc(dev);
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u_int32_t cmd;
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int error;
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/* Initialize private state */
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bzero(sc, sizeof(*sc));
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sc->ich_cmd = -1;
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sc->dev = dev;
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/* Allocate an I/O range */
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sc->io_rid = ICH_SMB_BASE;
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sc->io_res = bus_alloc_resource(dev, SYS_RES_IOPORT,
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&sc->io_rid, 0, ~0, 16, RF_ACTIVE);
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if (sc->io_res == NULL) {
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log(LOG_ERR, "%s: can't map I/O\n", device_get_nameunit(dev));
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error = ENXIO;
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goto fail;
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}
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sc->io_bst = rman_get_bustag(sc->io_res);
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sc->io_bsh = rman_get_bushandle(sc->io_res);
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/* Allocate interrupt */
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sc->irq_rid = 0;
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sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
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&sc->irq_rid, RF_ACTIVE | RF_SHAREABLE);
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if (sc->irq_res == NULL) {
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log(LOG_ERR, "%s: can't get IRQ\n", device_get_nameunit(dev));
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error = ENXIO;
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goto fail;
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}
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/* Set up interrupt handler */
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error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC,
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ichsmb_device_intr, sc, &sc->irq_handle);
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if (error != 0) {
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log(LOG_ERR, "%s: can't setup irq\n", device_get_nameunit(dev));
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goto fail;
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}
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/* Enable I/O mapping */
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cmd = pci_read_config(dev, PCIR_COMMAND, 4);
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cmd |= PCIM_CMD_PORTEN;
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pci_write_config(dev, PCIR_COMMAND, cmd, 4);
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cmd = pci_read_config(dev, PCIR_COMMAND, 4);
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if ((cmd & PCIM_CMD_PORTEN) == 0) {
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log(LOG_ERR, "%s: can't enable memory map\n",
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device_get_nameunit(dev));
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error = ENXIO;
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goto fail;
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}
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/* Enable device */
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pci_write_config(dev, ICH_HOSTC, ICH_HOSTC_HST_EN, 1);
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/* Done */
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return (ichsmb_attach(dev));
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fail:
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/* Attach failed, release resources */
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ichsmb_release_resources(sc);
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return (error);
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}
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