a0f70ac053
deltas, but it is possible since I had a few merge conflicts over the last few days while this has been sitting ready to go. (Part 1 was committed to the config files, but cvs aborted grrr..) Approved by: core
44 lines
1.2 KiB
C
44 lines
1.2 KiB
C
#ifdef PC98
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#define DSP_RESET (sbc_base + 0x600)
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#define DSP_READ (sbc_base + 0xA00)
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#define DSP_WRITE (sbc_base + 0xC00)
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#define DSP_COMMAND (sbc_base + 0xC00)
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#define DSP_STATUS (sbc_base + 0xC00)
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#define DSP_DATA_AVAIL (sbc_base + 0xE00)
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#define DSP_DATA_AVL16 (sbc_base + 0xF00)
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#define MIXER_ADDR (sbc_base + 0x400)
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#define MIXER_DATA (sbc_base + 0x500)
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#define OPL3_LEFT (sbc_base + 0x000)
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#define OPL3_RIGHT (sbc_base + 0x200)
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#define OPL3_BOTH (sbc_base + 0x800)
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#else
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#define DSP_RESET (sbc_base + 0x6)
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#define DSP_READ (sbc_base + 0xA)
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#define DSP_WRITE (sbc_base + 0xC)
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#define DSP_COMMAND (sbc_base + 0xC)
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#define DSP_STATUS (sbc_base + 0xC)
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#define DSP_DATA_AVAIL (sbc_base + 0xE)
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#define DSP_DATA_AVL16 (sbc_base + 0xF)
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#define MIXER_ADDR (sbc_base + 0x4)
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#define MIXER_DATA (sbc_base + 0x5)
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#define OPL3_LEFT (sbc_base + 0x0)
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#define OPL3_RIGHT (sbc_base + 0x2)
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#define OPL3_BOTH (sbc_base + 0x8)
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#endif
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/* DSP Commands */
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#define DSP_CMD_SPKON 0xD1
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#define DSP_CMD_SPKOFF 0xD3
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#define DSP_CMD_DMAON 0xD0
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#define DSP_CMD_DMAOFF 0xD4
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#define IMODE_NONE 0
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#define IMODE_OUTPUT 1
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#define IMODE_INPUT 2
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#define IMODE_INIT 3
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#define IMODE_MIDI 4
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#define NORMAL_MIDI 0
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#define UART_MIDI 1
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