Peter Grehan a48c333805 Allow the PIC's IMR register to be read before ICW initialisation. ... As of git submit e179f6914152eca9, the Linux kernel does a simple probe of the PIC by writing a pattern to the IMR and then reading it back, prior to the init sequence of ICW words. The bhyve PIC emulation wasn't allowing the IMR to be read until the ICW sequence was complete. This limitation isn't required so relax the test. With this change, Linux kernels 3.15-rc2 and later won't hang on boot when calibrating the local APIC. Reviewed by: tychon MFC after: 3 days		2014-09-27 01:15:24 +00:00
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acpica	don't set CR4 PSE bit on amd64	2014-07-23 15:53:29 +00:00
amd64	ddb: allow specifying the exact address of the symtab and strtab	2014-09-25 08:28:10 +00:00
conf	As per [1] Intel only supports this driver on 64bit platforms.	2014-09-23 08:33:03 +00:00
ia32	x86: Allow users to change PSL_RF via ptrace(PT_SETREGS...)	2013-11-14 15:37:20 +00:00
include	Restructure the MSR handling so it is entirely handled by processor-specific	2014-09-20 02:35:21 +00:00
linux32	Re-gen after r271743 implementing most of	2014-09-18 08:40:00 +00:00
pci	Pull in r267961 and r267973 again. Fix for issues reported will follow.	2014-06-28 03:56:17 +00:00
vmm	Allow the PIC's IMR register to be read before ICW initialisation.	2014-09-27 01:15:24 +00:00
Makefile	Adjustments to make a tags file a bit more suitable to amd64.	2008-12-01 14:15:10 +00:00