12aac6b55b
former return the current status for the latter to use. Without this we could enable interrupts when they shouldn't be. It's still not quite right as it should only update the bits we care about, bit should be good enough until the correct fix can be tested. PR: 204270 Obtained from: ABT Systems Ltd Sponsored by: The FreeBSD Foundation
175 lines
3.7 KiB
ArmAsm
175 lines
3.7 KiB
ArmAsm
/*
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* CDDL HEADER START
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*
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* The contents of this file are subject to the terms of the
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* Common Development and Distribution License, Version 1.0 only
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* (the "License"). You may not use this file except in compliance
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* with the License.
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*
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* You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
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* or http://www.opensolaris.org/os/licensing.
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* See the License for the specific language governing permissions
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* and limitations under the License.
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*
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* When distributing Covered Code, include this CDDL HEADER in each
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* file and include the License file at usr/src/OPENSOLARIS.LICENSE.
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* If applicable, add the following below this CDDL HEADER, with the
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* fields enclosed by brackets "[]" replaced with your own identifying
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* information: Portions Copyright [yyyy] [name of copyright owner]
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*
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* CDDL HEADER END
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*
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* $FreeBSD$
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*/
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/*
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* Copyright 2004 Sun Microsystems, Inc. All rights reserved.
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* Use is subject to license terms.
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*/
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#define _ASM
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#define _LOCORE
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#include <sys/cpuvar_defs.h>
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#include <sys/dtrace.h>
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#include <machine/armreg.h>
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#include <machine/asm.h>
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#include "assym.s"
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/*
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void dtrace_membar_producer(void)
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*/
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ENTRY(dtrace_membar_producer)
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RET
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END(dtrace_membar_producer)
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/*
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void dtrace_membar_consumer(void)
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*/
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ENTRY(dtrace_membar_consumer)
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RET
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END(dtrace_membar_consumer)
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/*
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dtrace_icookie_t dtrace_interrupt_disable(void)
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*/
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ENTRY(dtrace_interrupt_disable)
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mrs x0, daif
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msr daifset, #2
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RET
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END(dtrace_interrupt_disable)
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/*
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void dtrace_interrupt_enable(dtrace_icookie_t cookie)
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*/
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ENTRY(dtrace_interrupt_enable)
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msr daif, x0
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RET
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END(dtrace_interrupt_enable)
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/*
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uint8_t
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dtrace_fuword8_nocheck(void *addr)
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*/
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ENTRY(dtrace_fuword8_nocheck)
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ldrb w0, [x0]
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RET
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END(dtrace_fuword8_nocheck)
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/*
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uint16_t
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dtrace_fuword16_nocheck(void *addr)
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*/
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ENTRY(dtrace_fuword16_nocheck)
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ldrh w0, [x0]
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RET
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END(dtrace_fuword16_nocheck)
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/*
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uint32_t
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dtrace_fuword32_nocheck(void *addr)
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*/
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ENTRY(dtrace_fuword32_nocheck)
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ldr w0, [x0]
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RET
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END(dtrace_fuword32_nocheck)
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/*
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uint64_t
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dtrace_fuword64_nocheck(void *addr)
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*/
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ENTRY(dtrace_fuword64_nocheck)
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ldr x0, [x0]
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RET
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END(dtrace_fuword64_nocheck)
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/*
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void
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dtrace_copy(uintptr_t uaddr, uintptr_t kaddr, size_t size)
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*/
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ENTRY(dtrace_copy)
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cbz x2, 2f /* If len == 0 then skip loop */
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1:
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ldrb w4, [x0], #1 /* Load from uaddr */
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strb w4, [x1], #1 /* Store in kaddr */
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sub x2, x2, #1 /* len-- */
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cbnz x2, 1b
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2:
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RET
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END(dtrace_copy)
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/*
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void
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dtrace_copystr(uintptr_t uaddr, uintptr_t kaddr, size_t size,
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volatile uint16_t *flags)
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XXX: Check for flags?
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*/
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ENTRY(dtrace_copystr)
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cbz x2, 2f /* If len == 0 then skip loop */
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1: ldrb w4, [x0], #1 /* Load from uaddr */
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strb w4, [x1], #1 /* Store in kaddr */
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cbz w4, 2f /* If == 0 then break */
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sub x2, x2, #1 /* len-- */
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cbnz x2, 1b
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2:
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RET
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END(dtrace_copystr)
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/*
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uintptr_t
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dtrace_caller(int aframes)
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*/
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ENTRY(dtrace_caller)
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mov x0, #-1
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RET
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END(dtrace_caller)
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/*
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uint32_t
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dtrace_cas32(uint32_t *target, uint32_t cmp, uint32_t new)
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*/
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ENTRY(dtrace_cas32)
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1: ldxr w3, [x0] /* Load target */
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cmp w3, w1 /* Check if *target == cmp */
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bne 2f /* No, return */
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stxr w12, w2, [x0] /* Store new to target */
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cbnz w12, 1b /* Try again if store not succeed */
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2: mov w0, w3 /* Return the value loaded from target */
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RET
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END(dtrace_cas32)
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/*
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void *
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dtrace_casptr(volatile void *target, volatile void *cmp, volatile void *new)
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*/
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ENTRY(dtrace_casptr)
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1: ldxr x3, [x0] /* Load target */
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cmp x3, x1 /* Check if *target == cmp */
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bne 2f /* No, return */
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stxr w12, x2, [x0] /* Store new to target */
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cbnz w12, 1b /* Try again if store not succeed */
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2: mov x0, x3 /* Return the value loaded from target */
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RET
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END(dtrace_casptr)
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