03479763b2
available on firmwares 3.15 and earlier. Caveats: Support for the internal SATA controller is currently missing, as is support for framebuffer resolutions other than 720x480. These deficiencies will be remedied soon. Special thanks to Peter Grehan for providing the hardware that made this port possible, and thanks to Geoff Levand of Sony Computer Entertainment for advice on the LV1 hypervisor.
112 lines
5.6 KiB
Plaintext
112 lines
5.6 KiB
Plaintext
/*
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* Playstation 3 LV1 hypercall interface
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*
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* $FreeBSD$
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*/
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#include <sys/types.h>
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enum lpar_id {
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PS3_LPAR_ID_CURRENT = 0x00,
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PS3_LPAR_ID_PME = 0x01,
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};
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static inline uint64_t
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lv1_repository_string(const char *str)
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{
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uint64_t ret = 0;
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strncpy((char *)&ret, str, sizeof(ret));
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return (ret);
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}
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# Code Name Inputs Outputs
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HVCALL 0 lv1_allocate_memory size,log_page_size,zero,flags base_addr,muid
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HVCALL 1 lv1_write_htab_entry vas_id,slot,pte_hi,pte_lo
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HVCALL 2 lv1_construct_virtual_address_space log_pteg_count,n_sizes,page_sizes vas_id,hv_pteg_count
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HVCALL 4 lv1_get_virtual_address_space_id_of_ppe ppe_id vas_id
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HVCALL 6 lv1_query_logical_partition_address_region_info lpar_id base_addr,size,access_right,max_page_size,flags
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HVCALL 7 lv1_select_virtual_address_space vas_id
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HVCALL 9 lv1_pause mode
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HVCALL 10 lv1_destruct_virtual_address_space vas_id
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HVCALL 11 lv1_configure_irq_state_bitmap ppe_id,cpu_id,bitmap_addr
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HVCALL 12 lv1_connect_irq_plug_ext ppe_id,cpu_id,virq,outlet,zero
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HVCALL 13 lv1_release_memory base_addr
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HVCALL 15 lv1_put_iopte ioas_id,ioif_addr,lpar_addr,io_id,flags
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HVCALL 17 lv1_disconnect_irq_plug_ext ppe_id,cpu_id,virq
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HVCALL 18 lv1_construct_event_receive_port UNUSED outlet
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HVCALL 19 lv1_destruct_event_receive_port outlet
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HVCALL 24 lv1_send_event_locally outlet
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HVCALL 27 lv1_end_of_interrupt irq
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HVCALL 28 lv1_connect_irq_plug virq,irq
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HVCALL 29 lv1_disconnect_irq_plus virq
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HVCALL 30 lv1_end_of_interrupt_ext ppe_id,cpu_id,virq
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HVCALL 31 lv1_did_update_interrupt_mask ppe_id,cpu_id
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HVCALL 44 lv1_shutdown_logical_partition cmd
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HVCALL 54 lv1_destruct_logical_spe spe_id
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HVCALL 57 lv1_construct_logical_spe pshift1,pshift2,pshift3,pshift4,pshift5,vas_id,spe_type priv2_addr,problem_phys,local_store_phys,unused,shadow_addr,spe_id
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HVCALL 61 lv1_set_spe_interrupt_mask spe_id,class,mask
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HVCALL 65 lv1_disable_logical_spe spe_id,zero
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HVCALL 66 lv1_clear_spe_interrupt_status spe_id,class,stat,zero
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HVCALL 67 lv1_get_spe_interrupt_status spe_id,class stat
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HVCALL 69 lv1_get_logical_ppe_id UNUSED ppe_id
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HVCALL 74 lv1_get_logical_partition_id UNUSED lpar_id
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HVCALL 78 lv1_get_spe_irq_outlet spe_id,class outlet
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HVCALL 79 lv1_set_spe_privilege_state_area_1_register spe_id,offset,value
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HVCALL 91 lv1_get_repository_node_value lpar_id,n1,n2,n3,n4 v1,v2
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HVCALL 95 lv1_read_htab_entries vas_id,slot hi1,hi2,hi3,hi4,rcbits
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HVCALL 96 lv1_set_dabr dabr,flags
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HVCALL 116 lv1_allocate_io_segment ioas_id,seg_size,io_pagesize ioif_addr
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HVCALL 117 lv1_release_io_segment ioas_id,ioif_addr
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HVCALL 120 lv1_construct_io_irq_outlet interrupt_id outlet
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HVCALL 121 lv1_destruct_io_irq_outlet outlet
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HVCALL 122 lv1_map_htab lpar_id htab_addr
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HVCALL 123 lv1_unmap_htab htab_addr
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HVCALL 127 lv1_get_version_info UNUSED firm_vers
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HVCALL 158 lv1_insert_htab_entry vas_id,pteg,pte_hi,pte_lo,lockflags,flags index,evicted_hi,evicted_lo
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HVCALL 162 lv1_read_virtual_uart port,buffer,bytes bytes_read
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HVCALL 163 lv1_write_virtual_uart port,buffer,bytes bytes_written
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HVCALL 164 lv1_set_virtual_uart_param port,param,value
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HVCALL 165 lv1_get_virtual_uart_param port,param value
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HVCALL 166 lv1_configure_virtual_uart lpar_addr outlet
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HVCALL 170 lv1_open_device bus,dev,zero
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HVCALL 171 lv1_close_device bus,dev
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HVCALL 172 lv1_map_device_mmio_region bus,dev,bus_addr,size,page_size lpar_addr
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HVCALL 173 lv1_unmap_device_mmio_region bus,dev,lpar_addr
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HVCALL 174 lv1_allocate_device_dma_region bus,dev,io_size,io_pagesize,flag dma_region
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HVCALL 175 lv1_free_device_dma_region bus,dev,dma_region
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HVCALL 176 lv1_map_device_dma_region bus,dev,lpar_addr,dma_region,size,flags
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HVCALL 177 lv1_unmap_device_dma_region bus,dev,dma_region,size
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HVCALL 178 lv1_read_pci_config ps3bus,bus,dev,func,offset,size result
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HVCALL 179 lv1_write_pci_config ps3bus,bus,dev,func,offset,size,data
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HVCALL 185 lv1_net_add_multicast_address bus,dev,addr,flags
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HVCALL 186 lv1_net_remove_multicast_address bus,dev,zero,one
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HVCALL 187 lv1_net_start_tx_dma bus,dev,bus_addr,zero
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HVCALL 188 lv1_net_stop_tx_dma bus,dev,zero
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HVCALL 189 lv1_net_start_rx_dma bus,dev,bus_addr,zero
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HVCALL 190 lv1_net_stop_rx_dma bus,dev,zero
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HVCALL 191 lv1_net_set_interrupt_status_indicator bus,dev,irq_status_addr,zero
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HVCALL 193 lv1_net_set_interrupt_mask bus,dev,mask,zero
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HVCALL 194 lv1_net_control bus,dev,p1,p2,p3,p4 v1,v2
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HVCALL 197 lv1_connect_interrupt_event_receive_port bus,dev,outlet,irq
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HVCALL 198 lv1_disconnect_interrupt_event_receive_port bus,dev,outlet,irq
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HVCALL 202 lv1_deconfigure_virtual_uart_irq
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HVCALL 207 lv1_enable_logical_spe spe_id,resource_id
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HVCALL 210 lv1_gpu_open zero
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HVCALL 211 lv1_gpu_close
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HVCALL 212 lv1_gpu_device_map dev lpar_addr,lpar_size
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HVCALL 213 lv1_gpu_device_unmap dev
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HVCALL 214 lv1_gpu_memory_allocate ddr_size,zero1,zero2,zero3,zero4 handle,ddr_lpar
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HVCALL 216 lv1_gpu_memory_free handle
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HVCALL 217 lv1_gpu_context_allocate handle, zero chandle,lpar_dma_control,lpar_driver_info,lpar_reports,lpar_reports_size
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HVCALL 218 lv1_gpu_context_free chandle
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HVCALL 221 lv1_gpu_context_iomap changle,gpu_ioif,xdr_lpar,fbsize,ioflags
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HVCALL 225 lv1_gpu_context_attribute chandle,op,p1,p2,p3,p4
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HVCALL 227 lv1_gpu_context_intr chandle v1
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HVCALL 232 lv1_get_rtc UNUSED rtc_val,timebase
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HVCALL 245 lv1_storage_read dev,region,sector,nsectors,flags,buf dma_tag
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HVCALL 246 lv1_storage_write dev,region,sector,nsectors,flags,buf dma_tag
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HVCALL 248 lv1_storage_send_device_command dev,cmd_id,cmd_block,cmd_size,data_buf,blocks dma_tag
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HVCALL 249 lv1_storage_get_async_status dev dma_tag,status
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HVCALL 254 lv1_storage_check_async_status dev,dma_tag status
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HVCALL 255 lv1_panic howto
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