eec7e07a40
for now since I don't have any documentation on this card yet and it is software compatible with the earlier cards. The 2940 *Ultra* is Adaptec's push to take SCSI to 20MHz bus rates. Its based on the aic7880 chip which is the successor to the aic7870.
177 lines
4.6 KiB
C
177 lines
4.6 KiB
C
/*
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* Product specific probe and attach routines for:
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* 3940, 2940, aic7870, and aic7850 SCSI controllers
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*
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* Copyright (c) 1995 Justin T. Gibbs
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Absolutely no warranty of function or purpose is made by the author
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* Justin T. Gibbs.
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* 4. Modifications may be freely made to this file if the above conditions
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* are met.
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*
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* $Id: aic7870.c,v 1.14 1995/09/05 23:53:48 gibbs Exp $
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*/
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#include <pci.h>
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#if NPCI > 0
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <scsi/scsi_all.h>
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#include <scsi/scsiconf.h>
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#include <pci/pcireg.h>
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#include <pci/pcivar.h>
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#include <i386/scsi/aic7xxx.h>
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#define PCI_BASEADR0 PCI_MAP_REG_START
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#define PCI_DEVICE_ID_ADAPTEC_2940U 0x81789004ul
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#define PCI_DEVICE_ID_ADAPTEC_3940 0x72789004ul
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#define PCI_DEVICE_ID_ADAPTEC_2940 0x71789004ul
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#define PCI_DEVICE_ID_ADAPTEC_AIC7870 0x70789004ul
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#define PCI_DEVICE_ID_ADAPTEC_AIC7850 0x50789004ul
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#define DEVCONFIG 0x40
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#define MPORTMODE 0x00000400ul /* aic7870 only */
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#define RAMPSM 0x00000200ul /* aic7870 only */
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#define VOLSENSE 0x00000100ul
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#define DEVCONFIG7 0x00000080ul
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#define MRDCEN 0x00000040ul
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#define EXTSCBTIME 0x00000020ul /* aic7870 only */
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#define EXTSCBPEN 0x00000010ul /* aic7870 only */
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#define BERREN 0x00000008ul
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#define DACEN 0x00000004ul
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#define STPWLEVEL 0x00000002ul
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#define DIFACTNEGEN 0x00000001ul /* aic7870 only */
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static char* aic7870_probe __P((pcici_t tag, pcidi_t type));
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void aic7870_attach __P((pcici_t config_id, int unit));
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static u_long aic7870_count;
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static u_char aic3940_count;
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struct pci_device ahc_device = {
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"ahc",
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aic7870_probe,
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aic7870_attach,
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&aic7870_count,
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NULL
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};
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DATA_SET (pcidevice_set, ahc_device);
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static char*
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aic7870_probe (pcici_t tag, pcidi_t type)
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{
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switch(type) {
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case PCI_DEVICE_ID_ADAPTEC_3940:
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return ("Adaptec 3940 SCSI host adapter");
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break;
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case PCI_DEVICE_ID_ADAPTEC_2940U:
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return ("Adaptec 2940 Ultra SCSI host adapter");
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break;
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case PCI_DEVICE_ID_ADAPTEC_2940:
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return ("Adaptec 2940 SCSI host adapter");
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break;
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case PCI_DEVICE_ID_ADAPTEC_AIC7870:
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return ("Adaptec aic7870 SCSI host adapter");
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break;
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case PCI_DEVICE_ID_ADAPTEC_AIC7850:
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return ("Adaptec aic7850 SCSI host adapter");
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break;
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default:
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break;
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}
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return (0);
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}
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void
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aic7870_attach(config_id, unit)
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pcici_t config_id;
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int unit;
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{
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u_long io_port;
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unsigned opri = 0;
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ahc_type ahc_t = AHC_NONE;
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ahc_flag ahc_f = AHC_FNONE;
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if(!(io_port = pci_conf_read(config_id, PCI_BASEADR0)))
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return;
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/*
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* Make the offsets the same as for EISA
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* The first bit of PCI_BASEADR0 is always
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* set hence we subtract 0xc01 instead of the
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* 0xc00 that you would expect.
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*/
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io_port -= 0xc01ul;
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switch (pci_conf_read(config_id, PCI_ID_REG)) {
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case PCI_DEVICE_ID_ADAPTEC_3940:
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ahc_t = AHC_394;
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aic3940_count++;
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if(!(aic3940_count & 0x01))
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/* Even count implies second channel */
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ahc_f |= AHC_CHNLB;
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break;
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case PCI_DEVICE_ID_ADAPTEC_2940U:
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case PCI_DEVICE_ID_ADAPTEC_2940:
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ahc_t = AHC_294;
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break;
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case PCI_DEVICE_ID_ADAPTEC_AIC7870:
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ahc_t = AHC_AIC7870;
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break;
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case PCI_DEVICE_ID_ADAPTEC_AIC7850:
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ahc_t = AHC_AIC7850;
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break;
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default:
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break;
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}
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if(ahc_t & AHC_AIC7870){
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u_long devconfig = pci_conf_read(config_id, DEVCONFIG);
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if(devconfig & RAMPSM) {
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/*
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* External SRAM present. Have the probe walk
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* the SCBs to see how much SRAM we have and set
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* the number of SCBs accordingly.
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*/
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ahc_f |= AHC_EXTSCB;
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}
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}
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if(ahcprobe(unit, io_port, ahc_t, ahc_f)){
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ahc_unit++;
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/*
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* To be compatible with the isa style of
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* interrupt handler, we pass the unit number
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* not a pointer to our per device structure.
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*/
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if(!(pci_map_int(config_id, ahcintr, (void *)unit,
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&bio_imask))) {
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free(ahcdata[unit], M_TEMP);
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ahcdata[unit] = NULL;
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return;
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}
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/*
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* Since ahc_attach will poll, protect ourself
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* from the registered interrupt handler.
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*/
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opri = splbio();
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ahc_attach(unit);
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splx(opri);
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}
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return;
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}
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#endif /* NPCI > 0 */
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