daf9197cff
will sometimes fail to initialize problem due to a lock contention with management hardware. However, in order to deliver that fix it was necessary to take a shared code update as a whole, and this required scattered changes in the core code to be compatible. The em driver now has VLAN HW support added as the igb driver had previously. MFC after: ASAP - in time for 7.1 RELEASE
163 lines
7.6 KiB
C
163 lines
7.6 KiB
C
/******************************************************************************
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Copyright (c) 2001-2008, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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******************************************************************************/
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/*$FreeBSD$*/
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#ifndef _E1000_API_H_
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#define _E1000_API_H_
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#include "e1000_hw.h"
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extern void e1000_init_function_pointers_82542(struct e1000_hw *hw);
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extern void e1000_init_function_pointers_82543(struct e1000_hw *hw);
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extern void e1000_init_function_pointers_82540(struct e1000_hw *hw);
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extern void e1000_init_function_pointers_82571(struct e1000_hw *hw);
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extern void e1000_init_function_pointers_82541(struct e1000_hw *hw);
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extern void e1000_init_function_pointers_80003es2lan(struct e1000_hw *hw);
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extern void e1000_init_function_pointers_ich8lan(struct e1000_hw *hw);
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extern void e1000_init_function_pointers_82575(struct e1000_hw *hw);
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extern void e1000_rx_fifo_flush_82575(struct e1000_hw *hw);
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extern void e1000_init_function_pointers_vf(struct e1000_hw *hw);
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extern void e1000_shutdown_fiber_serdes_link(struct e1000_hw *hw);
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s32 e1000_set_mac_type(struct e1000_hw *hw);
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s32 e1000_setup_init_funcs(struct e1000_hw *hw, bool init_device);
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s32 e1000_init_mac_params(struct e1000_hw *hw);
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s32 e1000_init_nvm_params(struct e1000_hw *hw);
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s32 e1000_init_phy_params(struct e1000_hw *hw);
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s32 e1000_get_bus_info(struct e1000_hw *hw);
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void e1000_clear_vfta(struct e1000_hw *hw);
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void e1000_write_vfta(struct e1000_hw *hw, u32 offset, u32 value);
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s32 e1000_force_mac_fc(struct e1000_hw *hw);
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s32 e1000_check_for_link(struct e1000_hw *hw);
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s32 e1000_reset_hw(struct e1000_hw *hw);
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s32 e1000_init_hw(struct e1000_hw *hw);
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s32 e1000_setup_link(struct e1000_hw *hw);
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s32 e1000_get_speed_and_duplex(struct e1000_hw *hw, u16 *speed,
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u16 *duplex);
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s32 e1000_disable_pcie_master(struct e1000_hw *hw);
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void e1000_config_collision_dist(struct e1000_hw *hw);
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void e1000_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
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void e1000_mta_set(struct e1000_hw *hw, u32 hash_value);
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u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr);
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void e1000_update_mc_addr_list(struct e1000_hw *hw,
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u8 *mc_addr_list, u32 mc_addr_count,
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u32 rar_used_count, u32 rar_count);
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s32 e1000_setup_led(struct e1000_hw *hw);
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s32 e1000_cleanup_led(struct e1000_hw *hw);
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s32 e1000_check_reset_block(struct e1000_hw *hw);
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s32 e1000_blink_led(struct e1000_hw *hw);
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s32 e1000_led_on(struct e1000_hw *hw);
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s32 e1000_led_off(struct e1000_hw *hw);
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void e1000_reset_adaptive(struct e1000_hw *hw);
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void e1000_update_adaptive(struct e1000_hw *hw);
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s32 e1000_get_cable_length(struct e1000_hw *hw);
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s32 e1000_validate_mdi_setting(struct e1000_hw *hw);
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s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 offset, u16 *data);
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s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 offset, u16 data);
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s32 e1000_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg,
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u32 offset, u8 data);
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s32 e1000_get_phy_info(struct e1000_hw *hw);
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void e1000_release_phy(struct e1000_hw *hw);
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s32 e1000_acquire_phy(struct e1000_hw *hw);
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s32 e1000_cfg_on_link_up(struct e1000_hw *hw);
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s32 e1000_phy_hw_reset(struct e1000_hw *hw);
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s32 e1000_phy_commit(struct e1000_hw *hw);
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void e1000_power_up_phy(struct e1000_hw *hw);
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void e1000_power_down_phy(struct e1000_hw *hw);
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s32 e1000_read_mac_addr(struct e1000_hw *hw);
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s32 e1000_read_pba_num(struct e1000_hw *hw, u32 *part_num);
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void e1000_reload_nvm(struct e1000_hw *hw);
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s32 e1000_update_nvm_checksum(struct e1000_hw *hw);
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s32 e1000_validate_nvm_checksum(struct e1000_hw *hw);
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s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
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s32 e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
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s32 e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
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s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words,
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u16 *data);
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s32 e1000_wait_autoneg(struct e1000_hw *hw);
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s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active);
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s32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active);
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bool e1000_check_mng_mode(struct e1000_hw *hw);
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bool e1000_enable_tx_pkt_filtering(struct e1000_hw *hw);
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s32 e1000_mng_enable_host_if(struct e1000_hw *hw);
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s32 e1000_mng_host_if_write(struct e1000_hw *hw,
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u8 *buffer, u16 length, u16 offset, u8 *sum);
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s32 e1000_mng_write_cmd_header(struct e1000_hw *hw,
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struct e1000_host_mng_command_header *hdr);
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s32 e1000_mng_write_dhcp_info(struct e1000_hw * hw,
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u8 *buffer, u16 length);
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u32 e1000_translate_register_82542(u32 reg);
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/*
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* TBI_ACCEPT macro definition:
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*
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* This macro requires:
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* adapter = a pointer to struct e1000_hw
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* status = the 8 bit status field of the Rx descriptor with EOP set
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* error = the 8 bit error field of the Rx descriptor with EOP set
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* length = the sum of all the length fields of the Rx descriptors that
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* make up the current frame
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* last_byte = the last byte of the frame DMAed by the hardware
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* max_frame_length = the maximum frame length we want to accept.
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* min_frame_length = the minimum frame length we want to accept.
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*
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* This macro is a conditional that should be used in the interrupt
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* handler's Rx processing routine when RxErrors have been detected.
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*
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* Typical use:
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* ...
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* if (TBI_ACCEPT) {
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* accept_frame = TRUE;
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* e1000_tbi_adjust_stats(adapter, MacAddress);
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* frame_length--;
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* } else {
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* accept_frame = FALSE;
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* }
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* ...
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*/
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/* The carrier extension symbol, as received by the NIC. */
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#define CARRIER_EXTENSION 0x0F
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#define TBI_ACCEPT(a, status, errors, length, last_byte, min_frame_size, max_frame_size) \
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(e1000_tbi_sbp_enabled_82543(a) && \
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(((errors) & E1000_RXD_ERR_FRAME_ERR_MASK) == E1000_RXD_ERR_CE) && \
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((last_byte) == CARRIER_EXTENSION) && \
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(((status) & E1000_RXD_STAT_VP) ? \
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(((length) > (min_frame_size - VLAN_TAG_SIZE)) && \
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((length) <= (max_frame_size + 1))) : \
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(((length) > min_frame_size) && \
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((length) <= (max_frame_size + VLAN_TAG_SIZE + 1)))))
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#endif
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