55bfaed1c0
Well, better late than newer, but things has been hectic
around here, sorry for the long delay.
DMA support has been added to the ATA disk driver.
This only works on Intel PIIX3/4, Acer Aladdin and Promise controllers.
The promise support works without the BIOS on the board,
and timing modes are set to support up to UDMA speed. This
solves the problems with having more than one promise controller
in the same system.
There is support for "generic" DMA, that might work on other
controllers, but now you have been warned :)
More chipset specific code will come soon, I have to find testers
with the approbiate HW, more on that when I have it ready.
The system now uses its own major numbers, please run MAKEDEV
with the devices you need (ad?, acd?, afd?, ast?).
For now the disk driver will also attach to the old wd major
so one can at least boot without this step, but be warned, this
will eventually go away. The bootblocks will have to be changed
before one can boot directly from an "ad" device though.
Fixed problems:
All known hang problems should be solved
The probe code has been sligthly changed, this should solve
the reports I have lying around (I hope).
Hangs when accessing ata & atapi device on the same channel simultaniously.
A real braino in ata_start caused this, fixed.
As usual USE AT YOUR OWN RISK!!, this is still pre alpha level code.
Especially the DMA support can hose your disk real bad if anything
goes wrong, agaiin you have been warned :)
But please tell me how it works for you!
Enjoy!
-Søren
155 lines
6.1 KiB
C
155 lines
6.1 KiB
C
/*-
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* Copyright (c) 1998,1999 Søren Schmidt
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification, immediately at the beginning of the file.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: ata-disk.h,v 1.4 1999/03/07 21:49:14 sos Exp $
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*/
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/* ATA device parameter information */
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struct ata_params {
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int16_t config; /* general configuration bits */
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u_int16_t cylinders; /* number of cylinders */
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int16_t reserved2;
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u_int16_t heads; /* # heads */
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int16_t unfbytespertrk; /* # unformatted bytes/track */
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int16_t unfbytes; /* # unformatted bytes/sector */
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u_int16_t sectors; /* # sectors/track */
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int16_t vendorunique0[3];
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int8_t serial[20]; /* serial number */
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int16_t buffertype; /* buffer type */
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#define ATA_BT_SINGLEPORTSECTOR 1 /* 1 port, 1 sector buffer */
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#define ATA_BT_DUALPORTMULTI 2 /* 2 port, mult sector buffer */
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#define ATA_BT_DUALPORTMULTICACHE 3 /* above plus track cache */
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int16_t buffersize; /* buf size, 512-byte units */
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int16_t necc; /* ecc bytes appended */
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int8_t revision[8]; /* firmware revision */
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int8_t model[40]; /* model name */
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int8_t nsecperint; /* sectors per interrupt */
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int8_t vendorunique1;
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int16_t usedmovsd; /* double word read/write? */
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u_int8_t vendorcap; /* vendor capabilities */
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u_int8_t dmaflag :1; /* DMA supported - always 1 */
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u_int8_t lbaflag :1; /* LBA supported - always 1 */
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u_int8_t iordydis :1; /* IORDY may be disabled */
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u_int8_t iordyflag :1; /* IORDY supported */
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u_int8_t :1;
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u_int8_t standby :1; /* standby timer supported */
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u_int8_t :1;
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u_int8_t :1;
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int16_t capvalidate; /* validation for above */
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int8_t vendorunique3;
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int8_t opiomode; /* PIO modes 0-2 */
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int8_t vendorunique4;
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int8_t odmamode; /* old DMA modes, not ATA-3 */
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int16_t atavalid; /* fields valid */
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#define ATA_FLAG_54_58 1 /* words 54-58 valid */
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#define ATA_FLAG_64_70 2 /* words 64-70 valid */
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int16_t currcyls;
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int16_t currheads;
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int16_t currsectors;
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int16_t currsize0;
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int16_t currsize1;
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int8_t currmultsect;
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int8_t multsectvalid;
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int32_t lbasize;
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int16_t sdmamodes; /* singleword DMA modes */
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int16_t wdmamodes; /* multiword DMA modes */
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int16_t apiomodes; /* advanced PIO modes */
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u_int16_t mwdmamin; /* min. M/W DMA time/word ns */
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u_int16_t mwdmarec; /* rec. M/W DMA time ns */
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u_int16_t pioblind; /* min. PIO cycle w/o flow */
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u_int16_t pioiordy; /* min. PIO cycle IORDY flow */
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int16_t reserved69;
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int16_t reserved70;
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u_int16_t rlsovlap; /* rel time (us) for overlap */
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u_int16_t rlsservice; /* rel time (us) for service */
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int16_t reserved73;
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int16_t reserved74;
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int16_t queuelen;
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int16_t reserved76;
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int16_t reserved77;
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int16_t reserved78;
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int16_t reserved79;
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int16_t versmajor;
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int16_t versminor;
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int16_t featsupp1;
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int16_t featsupp2;
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int16_t featsupp3;
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int16_t featenab1;
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int16_t featenab2;
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int16_t featenab3;
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int16_t udmamodes; /* UltraDMA modes */
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int16_t erasetime;
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int16_t enherasetime;
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int16_t apmlevel;
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int16_t reserved92[34];
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int16_t rmvcap;
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int16_t securelevel;
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};
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/* Structure describing an ATA disk */
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struct ad_softc {
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struct ata_softc *controller; /* ptr to parent ctrl */
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struct ata_params *ata_parm; /* ata device params */
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struct diskslices *slices;
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int32_t unit; /* ATA_MASTER or ATA_SLAVE */
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int32_t lun; /* logical unit number */
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u_int16_t cylinders; /* disk geometry (probed) */
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u_int8_t heads;
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u_int8_t sectors;
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u_int32_t total_secs; /* total # of sectors (LBA) */
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u_int32_t transfersize; /* size of each transfer */
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u_int32_t currentsize; /* size of current transfer */
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struct buf_queue_head queue; /* head of request queue */
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u_int32_t bytecount; /* bytes to transfer */
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u_int32_t donecount; /* bytes transferred */
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u_int32_t active; /* active processing request */
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u_int32_t flags; /* drive flags */
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#define AD_F_LABELLING 0x0001
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#define AD_F_USE_LBA 0x0002
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#define AD_F_USE_32BIT 0x0004
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#define AD_F_DMA_ENABLED 0x0008
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#define AD_F_DMA_USED 0x0010
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struct devstat stats; /* devstat entry */
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#ifdef DEVFS
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void *cdevs_token;
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void *bdevs_token;
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#endif
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};
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void ad_transfer(struct buf *);
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int32_t ad_interrupt(struct buf *);
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