Scott Long aa2ea23220 Add support for the memory-mapped PCI Express configuration mechanism. This ... actually is a property of the northbridge and applies to all PCI/PCI-X/PCIe devices in the system, though only PCIe devices will respond to registers higher than 256. This uses per-CPU pools of temporary mappings so that the whole 256MB of configuration space doesn't have to be mapped all at once. While the sf_buf API was considered for this, the fact that it requires sleep locks and can return failure made it unsuitable for this use. For now only the Intel Grantsdale and Lindenhurst (925 and 752x) chipsets are supported. Since there doesn't appear to be a compatible way to determine northbridge support, new chipsets will have to be explicitely added in the future.		2004-12-06 08:27:10 +00:00
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pci_bus.c	Add TUNABLE_LONG and TUNABLE_ULONG, and use the latter for the	2004-10-31 15:50:33 +00:00
pci_cfgreg.c	Add support for the memory-mapped PCI Express configuration mechanism. This	2004-12-06 08:27:10 +00:00
pci_pir.c	Trim a few things from the dmesg output and stick them under bootverbose to	2004-07-01 07:46:29 +00:00