23fbc06bfc
o Save and clear the LTESR register in the interrupt handler.
o In lbc_read_reg(), return the saved LTESR register value if applicable
(i.e. when the saved value is not invalid (read: ~0U)).
o In lbc_write_reg(), clear the bits in the saved register when when it's
written to and when the asved value is not invalid.
o Also in lbc_write_reg(), the LTESR register is unlocked (in H/W) when
bit 1 of LTEATR is cleared. We use this to invalidate our saved LTESR
register value. Subsequent reads and write go to H/W directly.
While here:
o In lbc_read_reg() & lbc_write_reg(), add some belts and suspenders to
catch when register offsets are out of range.
o In lbc_attach(), initialize completely and don't leave something left
for lbc_banks_enable().
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| .. | ||
| aim | ||
| booke | ||
| compile | ||
| conf | ||
| cpufreq | ||
| fpu | ||
| include | ||
| mambo | ||
| mpc85xx | ||
| ofw | ||
| powermac | ||
| powerpc | ||
| ps3 | ||
| psim | ||