1f3025e133
run as a 1/2 CPU guest on an 8.1 bhyve host.
bhyve/inout.c
inout.h
fbsdrun.c
- Rather than exiting on accesses to unhandled i/o ports, emulate
hardware by returning -1 on reads and ignoring writes to unhandled
ports. Support the previous mode by allowing a 'strict' parameter
to be set from the command line.
The 8.1 guest kernel was vastly cut down from GENERIC and had no
ISA devices. Booting GENERIC exposes a massive amount of random
touching of i/o ports (hello syscons/vga/atkbdc).
bhyve/consport.c
dev/bvm/bvm_console.c
- implement a simplistic signature for the bvm console by returning
'bv' for an inw on the port. Also, set the priority of the console
to CN_REMOTE if the signature was returned. This works better in
an environment where multiple consoles are in the kernel (hello syscons)
bhyve/rtc.c
- return 0 for the access to RTC_EQUIPMENT (yes, you syscons)
amd64/vmm/x86.c
x86.h
- hide a bunch more CPUID leaf 1 bits from the guest to prevent
cpufreq drivers from probing.
The next step will be to move CPUID handling completely into
user-space. This will allow the full spectrum of changes from
presenting a lowest-common-denominator CPU type/feature set, to
exposing (almost) everything that the host can support.
Reviewed by: neel
Obtained from: NetApp
131 lines
3.1 KiB
C
131 lines
3.1 KiB
C
/*-
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* Copyright (c) 2011 NetApp, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <machine/cpufunc.h>
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#include <machine/specialreg.h>
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#include "x86.h"
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int
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x86_emulate_cpuid(uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx)
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{
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unsigned int func, regs[4];
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func = *eax;
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cpuid_count(*eax, *ecx, regs);
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switch(func) {
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case CPUID_0000_0000:
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case CPUID_0000_0002:
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case CPUID_0000_0003:
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case CPUID_0000_0004:
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case CPUID_0000_000A:
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break;
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case CPUID_8000_0000:
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case CPUID_8000_0001:
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case CPUID_8000_0002:
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case CPUID_8000_0003:
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case CPUID_8000_0004:
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case CPUID_8000_0006:
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case CPUID_8000_0007:
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case CPUID_8000_0008:
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break;
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case CPUID_0000_0001:
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/*
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* Override the APIC ID only in ebx
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*/
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regs[1] &= ~(CPUID_0000_0001_APICID_MASK);
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/*
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* XXX fixme for MP case, set apicid properly for cpu.
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*/
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regs[1] |= (0 << CPUID_0000_0001_APICID_SHIFT);
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/*
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* Don't expose VMX, SpeedStep or TME capability.
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* Advertise x2APIC capability.
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*/
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regs[2] &= ~(CPUID_0000_0001_FEAT0_VMX | CPUID2_EST |
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CPUID2_TM2);
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regs[2] |= CPUID2_X2APIC;
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/*
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* Hide thermal monitoring
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*/
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regs[3] &= ~(CPUID_ACPI | CPUID_TM);
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/*
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* Machine check handling is done in the host.
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* Hide MTRR capability.
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*/
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regs[3] &= ~(CPUID_MCA | CPUID_MCE | CPUID_MTRR);
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break;
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case CPUID_0000_0006:
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/*
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* Handle the access, but report 0 for
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* all options
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*/
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regs[0] = 0;
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regs[1] = 0;
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regs[2] = 0;
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regs[3] = 0;
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break;
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case CPUID_0000_000B:
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/*
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* XXXSMP fixme
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* Processor topology enumeration
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*/
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regs[0] = 0;
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regs[1] = 0;
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regs[2] = *ecx & 0xff;
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regs[3] = 0;
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break;
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default:
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return (0);
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}
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*eax = regs[0];
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*ebx = regs[1];
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*ecx = regs[2];
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*edx = regs[3];
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return (1);
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}
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