322 lines
9.6 KiB
C
322 lines
9.6 KiB
C
/* Assembler interface for targets using CGEN. -*- C -*-
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CGEN: Cpu tools GENerator
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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- the resultant file is machine generated, cgen-asm.in isn't
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Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and GDB, the GNU debugger.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/* ??? Eventually more and more of this stuff can go to cpu-independent files.
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Keep that in mind. */
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#include "sysdep.h"
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#include <ctype.h>
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#include <stdio.h>
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#include "ansidecl.h"
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#include "bfd.h"
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#include "symcat.h"
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#include "@prefix@-desc.h"
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#include "@prefix@-opc.h"
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#include "opintl.h"
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#undef min
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#define min(a,b) ((a) < (b) ? (a) : (b))
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#undef max
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#define max(a,b) ((a) > (b) ? (a) : (b))
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static const char * parse_insn_normal
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PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *));
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/* -- assembler routines inserted here */
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/* Default insn parser.
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The syntax string is scanned and operands are parsed and stored in FIELDS.
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Relocs are queued as we go via other callbacks.
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??? Note that this is currently an all-or-nothing parser. If we fail to
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parse the instruction, we return 0 and the caller will start over from
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the beginning. Backtracking will be necessary in parsing subexpressions,
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but that can be handled there. Not handling backtracking here may get
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expensive in the case of the m68k. Deal with later.
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Returns NULL for success, an error message for failure.
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*/
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static const char *
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parse_insn_normal (cd, insn, strp, fields)
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CGEN_CPU_DESC cd;
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const CGEN_INSN *insn;
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const char **strp;
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CGEN_FIELDS *fields;
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{
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/* ??? Runtime added insns not handled yet. */
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const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
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const char *str = *strp;
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const char *errmsg;
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const char *p;
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const CGEN_SYNTAX_CHAR_TYPE * syn;
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#ifdef CGEN_MNEMONIC_OPERANDS
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/* FIXME: wip */
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int past_opcode_p;
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#endif
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/* For now we assume the mnemonic is first (there are no leading operands).
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We can parse it without needing to set up operand parsing.
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GAS's input scrubber will ensure mnemonics are lowercase, but we may
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not be called from GAS. */
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p = CGEN_INSN_MNEMONIC (insn);
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while (*p && tolower (*p) == tolower (*str))
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++p, ++str;
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if (* p)
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return _("unrecognized instruction");
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#ifndef CGEN_MNEMONIC_OPERANDS
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if (* str && !isspace (* str))
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return _("unrecognized instruction");
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#endif
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CGEN_INIT_PARSE (cd);
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cgen_init_parse_operand (cd);
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#ifdef CGEN_MNEMONIC_OPERANDS
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past_opcode_p = 0;
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#endif
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/* We don't check for (*str != '\0') here because we want to parse
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any trailing fake arguments in the syntax string. */
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syn = CGEN_SYNTAX_STRING (syntax);
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/* Mnemonics come first for now, ensure valid string. */
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if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
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abort ();
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++syn;
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while (* syn != 0)
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{
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/* Non operand chars must match exactly. */
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if (CGEN_SYNTAX_CHAR_P (* syn))
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{
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/* FIXME: While we allow for non-GAS callers above, we assume the
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first char after the mnemonic part is a space. */
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/* FIXME: We also take inappropriate advantage of the fact that
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GAS's input scrubber will remove extraneous blanks. */
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if (tolower (*str) == tolower (CGEN_SYNTAX_CHAR (* syn)))
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{
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#ifdef CGEN_MNEMONIC_OPERANDS
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if (CGEN_SYNTAX_CHAR(* syn) == ' ')
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past_opcode_p = 1;
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#endif
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++ syn;
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++ str;
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}
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else if (*str)
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{
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/* Syntax char didn't match. Can't be this insn. */
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static char msg [80];
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/* xgettext:c-format */
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sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
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CGEN_SYNTAX_CHAR(*syn), *str);
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return msg;
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}
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else
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{
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/* Ran out of input. */
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static char msg [80];
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/* xgettext:c-format */
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sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
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CGEN_SYNTAX_CHAR(*syn));
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return msg;
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}
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continue;
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}
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/* We have an operand of some sort. */
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errmsg = @arch@_cgen_parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
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&str, fields);
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if (errmsg)
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return errmsg;
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/* Done with this operand, continue with next one. */
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++ syn;
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}
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/* If we're at the end of the syntax string, we're done. */
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if (* syn == 0)
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{
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/* FIXME: For the moment we assume a valid `str' can only contain
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blanks now. IE: We needn't try again with a longer version of
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the insn and it is assumed that longer versions of insns appear
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before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
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while (isspace (* str))
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++ str;
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if (* str != '\0')
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return _("junk at end of line"); /* FIXME: would like to include `str' */
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return NULL;
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}
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/* We couldn't parse it. */
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return _("unrecognized instruction");
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}
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/* Main entry point.
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This routine is called for each instruction to be assembled.
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STR points to the insn to be assembled.
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We assume all necessary tables have been initialized.
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The assembled instruction, less any fixups, is stored in BUF.
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Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
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still needs to be converted to target byte order, otherwise BUF is an array
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of bytes in target byte order.
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The result is a pointer to the insn's entry in the opcode table,
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or NULL if an error occured (an error message will have already been
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printed).
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Note that when processing (non-alias) macro-insns,
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this function recurses.
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??? It's possible to make this cpu-independent.
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One would have to deal with a few minor things.
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At this point in time doing so would be more of a curiosity than useful
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[for example this file isn't _that_ big], but keeping the possibility in
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mind helps keep the design clean. */
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const CGEN_INSN *
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@arch@_cgen_assemble_insn (cd, str, fields, buf, errmsg)
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CGEN_CPU_DESC cd;
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const char *str;
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CGEN_FIELDS *fields;
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CGEN_INSN_BYTES_PTR buf;
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char **errmsg;
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{
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const char *start;
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CGEN_INSN_LIST *ilist;
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const char *parse_errmsg = NULL;
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const char *insert_errmsg = NULL;
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/* Skip leading white space. */
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while (isspace (* str))
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++ str;
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/* The instructions are stored in hashed lists.
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Get the first in the list. */
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ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
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/* Keep looking until we find a match. */
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start = str;
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for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
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{
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const CGEN_INSN *insn = ilist->insn;
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#ifdef CGEN_VALIDATE_INSN_SUPPORTED
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/* not usually needed as unsupported opcodes shouldn't be in the hash lists */
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/* Is this insn supported by the selected cpu? */
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if (! @arch@_cgen_insn_supported (cd, insn))
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continue;
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#endif
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/* If the RELAX attribute is set, this is an insn that shouldn't be
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chosen immediately. Instead, it is used during assembler/linker
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relaxation if possible. */
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if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
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continue;
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str = start;
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/* Allow parse/insert handlers to obtain length of insn. */
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CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
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parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
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if (parse_errmsg != NULL)
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continue;
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/* ??? 0 is passed for `pc' */
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insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
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(bfd_vma) 0);
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if (insert_errmsg != NULL)
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continue;
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/* It is up to the caller to actually output the insn and any
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queued relocs. */
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return insn;
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}
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{
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static char errbuf[150];
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const char *tmp_errmsg;
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#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
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/* If requesting verbose error messages, use insert_errmsg.
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Failing that, use parse_errmsg */
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tmp_errmsg = (insert_errmsg ? insert_errmsg :
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parse_errmsg ? parse_errmsg :
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_("unrecognized instruction"));
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if (strlen (start) > 50)
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/* xgettext:c-format */
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sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
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else
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/* xgettext:c-format */
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sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
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#else
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if (strlen (start) > 50)
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/* xgettext:c-format */
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sprintf (errbuf, _("bad instruction `%.50s...'"), start);
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else
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/* xgettext:c-format */
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sprintf (errbuf, _("bad instruction `%.50s'"), start);
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#endif
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*errmsg = errbuf;
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return NULL;
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}
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}
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#if 0 /* This calls back to GAS which we can't do without care. */
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/* Record each member of OPVALS in the assembler's symbol table.
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This lets GAS parse registers for us.
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??? Interesting idea but not currently used. */
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/* Record each member of OPVALS in the assembler's symbol table.
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FIXME: Not currently used. */
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void
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@arch@_cgen_asm_hash_keywords (cd, opvals)
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CGEN_CPU_DESC cd;
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CGEN_KEYWORD *opvals;
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{
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CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
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const CGEN_KEYWORD_ENTRY * ke;
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while ((ke = cgen_keyword_search_next (& search)) != NULL)
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{
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#if 0 /* Unnecessary, should be done in the search routine. */
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if (! @arch@_cgen_opval_supported (ke))
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continue;
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#endif
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cgen_asm_record_register (cd, ke->name, ke->value);
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}
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}
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#endif /* 0 */
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