4ad6106939
* Support for sam9 "EMAC" controller.
* Support for rmii interface to phy.
at91.c & at91sam9.c:
* Eliminate separate at91sam9.c file.
* Add new devices to at91sam9_devs table.
at91_machdep.c & at at91sam9_machdep.c:
* Automatic chip type determination.
* Remove compile time chip dependencies.
* Eliminate separate at91sam9_machdep.c file.
at91_pmc.c:
* Corrected support for all of the sam926? and sam9g20 chips.
* Remove compile time chip dependencies.
My apologies to Greg for taking so long to take care of it.
71 lines
2.5 KiB
C
71 lines
2.5 KiB
C
/*-
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* Copyright (c) 2009 Greg Ansley All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* $FreeBSD$
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*/
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#ifndef _AT91REG_H_
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#define _AT91REG_H_
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#include "opt_at91.h"
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/* Where builtin peripherals start in KVM */
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#define AT91_BASE 0xd0000000
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/* A few things that we count on being the same
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* throught the whole family of SOCs */
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/* SYSC System Controler */
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/* System Registers */
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#define AT91_SYS_BASE 0xffff000
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#define AT91_SYS_SIZE 0x1000
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#if defined(AT91SAM9G45) || defined(AT91SAM9263)
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#define AT91_DBGU_BASE 0xfffee00
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#else
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#define AT91_DBGU_BASE 0xffff200
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#endif
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#define AT91_DBGU_SIZE 0x200
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#define DBGU_C1R (64) /* Chip ID1 Register */
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#define DBGU_C2R (68) /* Chip ID2 Register */
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#define DBGU_FNTR (72) /* Force NTRST Register */
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#define AT91_CPU_VERSION_MASK 0x0000001f
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#define AT91_CPU_RM9200 0x09290780
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#define AT91_CPU_SAM9260 0x019803a0
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#define AT91_CPU_SAM9261 0x019703a0
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#define AT91_CPU_SAM9263 0x019607a0
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#define AT91_CPU_SAM9G10 0x819903a0
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#define AT91_CPU_SAM9G20 0x019905a0
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#define AT91_CPU_SAM9G45 0x819b05a0
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#define AT91_ARCH(chipid) ((chipid >> 20) & 0xff)
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#define AT91_CPU(chipid) (chipid & ~AT91_CPU_VERSION_MASK)
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#define AT91_ARCH_SAM9 (0x19)
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#define AT91_ARCH_RM92 (0x92)
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#endif /* _AT91REG_H_ */
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